dt-bindings: serial: Convert NXP lpuart to json-schema
Convert the NXP lpuart binding to DT schema format using json-schema. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1597721685-9280-5-git-send-email-Anson.Huang@nxp.com Signed-off-by: Rob Herring <robh@kernel.org>
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* Freescale low power universal asynchronous receiver/transmitter (lpuart)
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Required properties:
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- compatible :
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- "fsl,vf610-lpuart" for lpuart compatible with the one integrated
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on Vybrid vf610 SoC with 8-bit register organization
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- "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
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on LS1021A SoC with 32-bit big-endian register organization
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- "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated
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on LS1028A SoC with 32-bit little-endian register organization
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- "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
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on i.MX7ULP SoC with 32-bit little-endian register organization
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- "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
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on i.MX8QXP SoC with 32-bit little-endian register organization
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- "fsl,imx8qm-lpuart" for lpuart compatible with the one integrated
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on i.MX8QM SoC with 32-bit little-endian register organization
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- reg : Address and length of the register set for the device
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- interrupts : Should contain uart interrupt
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- clocks : phandle + clock specifier pairs, one for each entry in clock-names
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- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart
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bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used
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to access lpuart controller registers, it also requires "baud" clock for
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module to receive/transmit data.
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Optional properties:
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- dmas: A list of two dma specifiers, one for each entry in dma-names.
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- dma-names: should contain "tx" and "rx".
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- rs485-rts-active-low, linux,rs485-enabled-at-boot-time: see rs485.txt
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Note: Optional properties for DMA support. Write them both or both not.
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Example:
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uart0: serial@40027000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40027000 0x1000>;
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interrupts = <0 61 0x00>;
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clocks = <&clks VF610_CLK_UART0>;
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clock-names = "ipg";
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dmas = <&edma0 0 2>,
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<&edma0 0 3>;
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dma-names = "rx","tx";
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale low power universal asynchronous receiver/transmitter (lpuart)
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maintainers:
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- Fugang Duan <fugang.duan@nxp.com>
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allOf:
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- $ref: "rs485.yaml"
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properties:
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compatible:
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enum:
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- fsl,vf610-lpuart
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- fsl,ls1021a-lpuart
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- fsl,ls1028a-lpuart
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- fsl,imx7ulp-lpuart
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- fsl,imx8qxp-lpuart
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- fsl,imx8qm-lpuart
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: ipg clock
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- description: baud clock
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minItems: 1
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maxItems: 2
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clock-names:
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items:
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- const: ipg
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- const: baud
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minItems: 1
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maxItems: 2
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dmas:
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items:
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- description: DMA controller phandle and request line for RX
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- description: DMA controller phandle and request line for TX
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dma-names:
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items:
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- const: rx
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- const: tx
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rs485-rts-active-low: true
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linux,rs485-enabled-at-boot-time: true
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/vf610-clock.h>
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serial@40027000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40027000 0x1000>;
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interrupts = <0 61 0x00>;
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clocks = <&clks VF610_CLK_UART0>;
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clock-names = "ipg";
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dmas = <&edma0 0 2>, <&edma0 0 3>;
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dma-names = "rx","tx";
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};
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