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drm/radeon/kms: rework combios i2c handling
Handle asic specific table to hw mappings in combios_setup_i2c_bus() directly. This allows us to remove most of the combios quirks and clean up the i2c bus setup. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
parent
f376b94fbc
commit
179e8078a7
1 changed files with 168 additions and 247 deletions
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@ -479,21 +479,67 @@ radeon_combios_get_hardcoded_edid(struct radeon_device *rdev)
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return NULL;
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}
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/* standard i2c gpio lines */
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#define RADEON_I2C_MONID_ID 0
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#define RADEON_I2C_DVI_ID 1
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#define RADEON_I2C_VGA_ID 2
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#define RADEON_I2C_CRT2_ID 3
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#define RADEON_I2C_MM_ID 4
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/* custom defined gpio lines */
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#define RADEON_I2C_LCD_ID 5 /* ddc for laptop panels */
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#define RADEON_I2C_GPIO_ID 6 /* rs4xx gpio ddc */
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#define RADEON_I2C_DVO_ID 7 /* i2c bus for dvo */
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static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rdev,
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int ddc_line)
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enum radeon_combios_ddc ddc,
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u32 clk_mask,
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u32 data_mask)
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{
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struct radeon_i2c_bus_rec i2c;
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int ddc_line = 0;
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/* ddc id = mask reg
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* DDC_NONE_DETECTED = none
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* DDC_DVI = RADEON_GPIO_DVI_DDC
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* DDC_VGA = RADEON_GPIO_VGA_DDC
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* DDC_LCD = RADEON_GPIOPAD_MASK
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* DDC_GPIO = RADEON_MDGPIO_MASK
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* r1xx/r2xx
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* DDC_MONID = RADEON_GPIO_MONID
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* DDC_CRT2 = RADEON_GPIO_CRT2_DDC
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* r3xx
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* DDC_MONID = RADEON_GPIO_MONID
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* DDC_CRT2 = RADEON_GPIO_DVI_DDC
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* rs3xx/rs4xx
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* DDC_MONID = RADEON_GPIOPAD_MASK
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* DDC_CRT2 = RADEON_GPIO_MONID
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*/
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switch (ddc) {
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case DDC_NONE_DETECTED:
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default:
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ddc_line = 0;
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break;
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case DDC_DVI:
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ddc_line = RADEON_GPIO_DVI_DDC;
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break;
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case DDC_VGA:
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ddc_line = RADEON_GPIO_VGA_DDC;
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break;
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case DDC_LCD:
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ddc_line = RADEON_GPIOPAD_MASK;
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break;
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case DDC_GPIO:
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ddc_line = RADEON_MDGPIO_MASK;
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break;
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case DDC_MONID:
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if (rdev->family == CHIP_RS300 ||
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rdev->family == CHIP_RS400 ||
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rdev->family == CHIP_RS480)
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ddc_line = RADEON_GPIOPAD_MASK;
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else
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ddc_line = RADEON_GPIO_MONID;
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break;
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case DDC_CRT2:
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if (rdev->family == CHIP_RS300 ||
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rdev->family == CHIP_RS400 ||
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rdev->family == CHIP_RS480)
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ddc_line = RADEON_GPIO_MONID;
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else if (rdev->family >= CHIP_R300) {
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ddc_line = RADEON_GPIO_DVI_DDC;
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ddc = DDC_DVI;
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} else
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ddc_line = RADEON_GPIO_CRT2_DDC;
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break;
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}
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if (ddc_line == RADEON_GPIOPAD_MASK) {
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i2c.mask_clk_reg = RADEON_GPIOPAD_MASK;
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@ -514,15 +560,6 @@ static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rde
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i2c.y_clk_reg = RADEON_MDGPIO_Y;
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i2c.y_data_reg = RADEON_MDGPIO_Y;
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} else {
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i2c.mask_clk_mask = RADEON_GPIO_EN_1;
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i2c.mask_data_mask = RADEON_GPIO_EN_0;
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i2c.a_clk_mask = RADEON_GPIO_A_1;
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i2c.a_data_mask = RADEON_GPIO_A_0;
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i2c.en_clk_mask = RADEON_GPIO_EN_1;
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i2c.en_data_mask = RADEON_GPIO_EN_0;
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i2c.y_clk_mask = RADEON_GPIO_Y_1;
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i2c.y_data_mask = RADEON_GPIO_Y_0;
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i2c.mask_clk_reg = ddc_line;
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i2c.mask_data_reg = ddc_line;
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i2c.a_clk_reg = ddc_line;
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@ -533,6 +570,26 @@ static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rde
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i2c.y_data_reg = ddc_line;
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}
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if (clk_mask && data_mask) {
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i2c.mask_clk_mask = clk_mask;
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i2c.mask_data_mask = data_mask;
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i2c.a_clk_mask = clk_mask;
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i2c.a_data_mask = data_mask;
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i2c.en_clk_mask = clk_mask;
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i2c.en_data_mask = data_mask;
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i2c.y_clk_mask = clk_mask;
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i2c.y_data_mask = data_mask;
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} else {
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i2c.mask_clk_mask = RADEON_GPIO_EN_1;
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i2c.mask_data_mask = RADEON_GPIO_EN_0;
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i2c.a_clk_mask = RADEON_GPIO_A_1;
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i2c.a_data_mask = RADEON_GPIO_A_0;
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i2c.en_clk_mask = RADEON_GPIO_EN_1;
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i2c.en_data_mask = RADEON_GPIO_EN_0;
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i2c.y_clk_mask = RADEON_GPIO_Y_1;
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i2c.y_data_mask = RADEON_GPIO_Y_0;
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}
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switch (rdev->family) {
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case CHIP_R100:
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case CHIP_RV100:
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@ -611,23 +668,7 @@ static struct radeon_i2c_bus_rec combios_setup_i2c_bus(struct radeon_device *rde
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}
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i2c.mm_i2c = false;
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switch (ddc_line) {
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case RADEON_GPIO_MONID:
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i2c.i2c_id = RADEON_I2C_MONID_ID;
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break;
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case RADEON_GPIO_DVI_DDC:
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i2c.i2c_id = RADEON_I2C_DVI_ID;
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break;
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case RADEON_GPIO_VGA_DDC:
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i2c.i2c_id = RADEON_I2C_VGA_ID;
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break;
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case RADEON_GPIO_CRT2_DDC:
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i2c.i2c_id = RADEON_I2C_CRT2_ID;
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break;
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default:
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i2c.i2c_id = 0xff;
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break;
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}
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i2c.i2c_id = ddc;
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i2c.hpd = RADEON_HPD_NONE;
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if (ddc_line)
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@ -643,23 +684,55 @@ void radeon_combios_i2c_init(struct radeon_device *rdev)
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struct drm_device *dev = rdev->ddev;
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struct radeon_i2c_bus_rec i2c;
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i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
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rdev->i2c_bus[0] = radeon_i2c_create(dev, &i2c, "MONID");
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i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
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rdev->i2c_bus[1] = radeon_i2c_create(dev, &i2c, "DVI_DDC");
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i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
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rdev->i2c_bus[0] = radeon_i2c_create(dev, &i2c, "DVI_DDC");
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i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
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rdev->i2c_bus[2] = radeon_i2c_create(dev, &i2c, "VGA_DDC");
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i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
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rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "CRT2_DDC");
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i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
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rdev->i2c_bus[1] = radeon_i2c_create(dev, &i2c, "VGA_DDC");
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i2c.valid = true;
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i2c.hw_capable = true;
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i2c.mm_i2c = true;
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i2c.i2c_id = RADEON_I2C_MM_ID;
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rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "MM_I2C");
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i2c.i2c_id = 0xa0;
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rdev->i2c_bus[2] = radeon_i2c_create(dev, &i2c, "MM_I2C");
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if (rdev->family == CHIP_RS300 ||
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rdev->family == CHIP_RS400 ||
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rdev->family == CHIP_RS480) {
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u16 offset;
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u8 id, blocks, clk, data;
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int i;
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i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
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rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
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offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE);
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if (offset) {
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blocks = RBIOS8(offset + 2);
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for (i = 0; i < blocks; i++) {
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id = RBIOS8(offset + 3 + (i * 5) + 0);
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if (id == 136) {
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clk = RBIOS8(offset + 3 + (i * 5) + 3);
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data = RBIOS8(offset + 3 + (i * 5) + 4);
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i2c = combios_setup_i2c_bus(rdev, DDC_MONID,
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clk, data);
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rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "GPIOPAD_MASK");
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break;
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}
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}
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}
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} else if (rdev->family >= CHIP_R300) {
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i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
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rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
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} else {
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i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
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rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
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i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
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rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "CRT2_DDC");
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}
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}
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bool radeon_combios_get_clock_info(struct drm_device *dev)
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@ -1299,7 +1372,7 @@ bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
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struct radeon_i2c_bus_rec i2c_bus;
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/* default for macs */
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i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
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i2c_bus = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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/* XXX some macs have duallink chips */
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@ -1321,49 +1394,16 @@ bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder
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struct drm_device *dev = encoder->base.dev;
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struct radeon_device *rdev = dev->dev_private;
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uint16_t offset;
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uint8_t ver, id, blocks, clk, data;
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int i;
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uint8_t ver;
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enum radeon_combios_ddc gpio;
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struct radeon_i2c_bus_rec i2c_bus;
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tmds->i2c_bus = NULL;
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if (rdev->flags & RADEON_IS_IGP) {
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offset = combios_get_table_offset(dev, COMBIOS_I2C_INFO_TABLE);
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if (offset) {
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ver = RBIOS8(offset);
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DRM_INFO("GPIO Table revision: %d\n", ver);
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blocks = RBIOS8(offset + 2);
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for (i = 0; i < blocks; i++) {
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id = RBIOS8(offset + 3 + (i * 5) + 0);
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if (id == 136) {
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clk = RBIOS8(offset + 3 + (i * 5) + 3);
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data = RBIOS8(offset + 3 + (i * 5) + 4);
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i2c_bus.valid = true;
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i2c_bus.mask_clk_mask = (1 << clk);
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i2c_bus.mask_data_mask = (1 << data);
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i2c_bus.a_clk_mask = (1 << clk);
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i2c_bus.a_data_mask = (1 << data);
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i2c_bus.en_clk_mask = (1 << clk);
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i2c_bus.en_data_mask = (1 << data);
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i2c_bus.y_clk_mask = (1 << clk);
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i2c_bus.y_data_mask = (1 << data);
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i2c_bus.mask_clk_reg = RADEON_GPIOPAD_MASK;
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i2c_bus.mask_data_reg = RADEON_GPIOPAD_MASK;
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i2c_bus.a_clk_reg = RADEON_GPIOPAD_A;
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i2c_bus.a_data_reg = RADEON_GPIOPAD_A;
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i2c_bus.en_clk_reg = RADEON_GPIOPAD_EN;
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i2c_bus.en_data_reg = RADEON_GPIOPAD_EN;
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i2c_bus.y_clk_reg = RADEON_GPIOPAD_Y;
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i2c_bus.y_data_reg = RADEON_GPIOPAD_Y;
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i2c_bus.i2c_id = RADEON_I2C_DVO_ID;
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radeon_i2c_add(rdev, &i2c_bus, "DVO");
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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tmds->dvo_chip = DVO_SIL164;
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tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */
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break;
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}
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}
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}
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i2c_bus = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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tmds->dvo_chip = DVO_SIL164;
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tmds->slave_addr = 0x70 >> 1; /* 7 bit addressing */
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} else {
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offset = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);
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if (offset) {
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@ -1372,38 +1412,15 @@ bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder
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tmds->slave_addr = RBIOS8(offset + 4 + 2);
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tmds->slave_addr >>= 1; /* 7 bit addressing */
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gpio = RBIOS8(offset + 4 + 3);
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switch (gpio) {
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case DDC_MONID:
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i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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break;
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case DDC_DVI:
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i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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break;
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case DDC_VGA:
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i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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break;
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case DDC_CRT2:
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/* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */
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if (rdev->family >= CHIP_R300)
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i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
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else
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i2c_bus = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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break;
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case DDC_LCD: /* MM i2c */
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if (gpio == DDC_LCD) {
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/* MM i2c */
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i2c_bus.valid = true;
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i2c_bus.hw_capable = true;
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i2c_bus.mm_i2c = true;
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i2c_bus.i2c_id = RADEON_I2C_MM_ID;
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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break;
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default:
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DRM_ERROR("Unsupported gpio %d\n", gpio);
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break;
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}
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i2c_bus.i2c_id = 0xa0;
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} else
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i2c_bus = combios_setup_i2c_bus(rdev, gpio, 0, 0);
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tmds->i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
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}
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}
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@ -1485,7 +1502,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
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/* these are the most common settings */
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if (rdev->flags & RADEON_SINGLE_CRTC) {
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/* VGA - primary dac */
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ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
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ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
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hpd.hpd = RADEON_HPD_NONE;
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radeon_add_legacy_encoder(dev,
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radeon_get_encoder_id(dev,
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@ -1500,7 +1517,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
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&hpd);
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} else if (rdev->flags & RADEON_IS_MOBILITY) {
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/* LVDS */
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ddc_i2c = combios_setup_i2c_bus(rdev, 0);
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ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0);
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hpd.hpd = RADEON_HPD_NONE;
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radeon_add_legacy_encoder(dev,
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radeon_get_encoder_id(dev,
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@ -1515,7 +1532,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
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&hpd);
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||||
|
||||
/* VGA - primary dac */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1530,7 +1547,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
&hpd);
|
||||
} else {
|
||||
/* DVI-I - tv dac, int tmds */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_1;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1551,7 +1568,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
&hpd);
|
||||
|
||||
/* VGA - primary dac */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1587,7 +1604,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (ibook)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* LVDS */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1599,7 +1616,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
CONNECTOR_OBJECT_ID_LVDS,
|
||||
&hpd);
|
||||
/* VGA - TV DAC */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1628,7 +1645,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (powerbook external tmds)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* LVDS */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1640,7 +1657,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
CONNECTOR_OBJECT_ID_LVDS,
|
||||
&hpd);
|
||||
/* DVI-I - primary dac, ext tmds */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_2; /* ??? */
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1677,7 +1694,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (powerbook internal tmds)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* LVDS */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1689,7 +1706,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
CONNECTOR_OBJECT_ID_LVDS,
|
||||
&hpd);
|
||||
/* DVI-I - primary dac, int tmds */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_1; /* ??? */
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1725,7 +1742,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (powerbook vga)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* LVDS */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1737,7 +1754,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
CONNECTOR_OBJECT_ID_LVDS,
|
||||
&hpd);
|
||||
/* VGA - primary dac */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1766,7 +1783,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (mini external tmds)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* DVI-I - tv dac, ext tmds */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_2; /* ??? */
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1803,7 +1820,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (mini internal tmds)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* DVI-I - tv dac, int tmds */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_1; /* ??? */
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1839,7 +1856,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (imac g5 isight)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* DVI-D - int tmds */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_1; /* ??? */
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1851,7 +1868,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D,
|
||||
&hpd);
|
||||
/* VGA - tv dac */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1880,7 +1897,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (emac)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* VGA - primary dac */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1892,7 +1909,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
CONNECTOR_OBJECT_ID_VGA,
|
||||
&hpd);
|
||||
/* VGA - tv dac */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1921,7 +1938,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_INFO("Connector Table: %d (rn50-power)\n",
|
||||
rdev->mode_info.connector_table);
|
||||
/* VGA - primary dac */
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1932,7 +1949,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
|
|||
DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
|
||||
CONNECTOR_OBJECT_ID_VGA,
|
||||
&hpd);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_encoder(dev,
|
||||
radeon_get_encoder_id(dev,
|
||||
|
@ -1962,33 +1979,6 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev,
|
|||
struct radeon_i2c_bus_rec *ddc_i2c,
|
||||
struct radeon_hpd *hpd)
|
||||
{
|
||||
struct radeon_device *rdev = dev->dev_private;
|
||||
|
||||
/* XPRESS DDC quirks */
|
||||
if ((rdev->family == CHIP_RS400 ||
|
||||
rdev->family == CHIP_RS480) &&
|
||||
ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC)
|
||||
*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
|
||||
else if ((rdev->family == CHIP_RS400 ||
|
||||
rdev->family == CHIP_RS480) &&
|
||||
ddc_i2c->mask_clk_reg == RADEON_GPIO_MONID) {
|
||||
*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIOPAD_MASK);
|
||||
ddc_i2c->mask_clk_mask = (0x20 << 8);
|
||||
ddc_i2c->mask_data_mask = 0x80;
|
||||
ddc_i2c->a_clk_mask = (0x20 << 8);
|
||||
ddc_i2c->a_data_mask = 0x80;
|
||||
ddc_i2c->en_clk_mask = (0x20 << 8);
|
||||
ddc_i2c->en_data_mask = 0x80;
|
||||
ddc_i2c->y_clk_mask = (0x20 << 8);
|
||||
ddc_i2c->y_data_mask = 0x80;
|
||||
ddc_i2c->i2c_id = RADEON_I2C_GPIO_ID;
|
||||
radeon_i2c_add(rdev, ddc_i2c, "GPIO_DDC");
|
||||
}
|
||||
|
||||
/* R3xx+ chips don't have GPIO_CRT2_DDC gpio pad */
|
||||
if ((rdev->family >= CHIP_R300) &&
|
||||
ddc_i2c->mask_clk_reg == RADEON_GPIO_CRT2_DDC)
|
||||
*ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
|
||||
/* Certain IBM chipset RN50s have a BIOS reporting two VGAs,
|
||||
one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */
|
||||
|
@ -2092,27 +2082,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
|
|||
connector = (tmp >> 12) & 0xf;
|
||||
|
||||
ddc_type = (tmp >> 8) & 0xf;
|
||||
switch (ddc_type) {
|
||||
case DDC_MONID:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus(rdev, RADEON_GPIO_MONID);
|
||||
break;
|
||||
case DDC_DVI:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
break;
|
||||
case DDC_VGA:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
break;
|
||||
case DDC_CRT2:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
|
||||
break;
|
||||
default:
|
||||
ddc_i2c.valid = false;
|
||||
break;
|
||||
}
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, ddc_type, 0, 0);
|
||||
|
||||
switch (connector) {
|
||||
case CONNECTOR_PROPRIETARY_LEGACY:
|
||||
|
@ -2282,7 +2252,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
|
|||
0),
|
||||
ATOM_DEVICE_DFP1_SUPPORT);
|
||||
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_DVI_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_1;
|
||||
radeon_add_legacy_connector(dev,
|
||||
0,
|
||||
|
@ -2302,7 +2272,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
|
|||
ATOM_DEVICE_CRT1_SUPPORT,
|
||||
1),
|
||||
ATOM_DEVICE_CRT1_SUPPORT);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
|
||||
ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
|
||||
hpd.hpd = RADEON_HPD_NONE;
|
||||
radeon_add_legacy_connector(dev,
|
||||
0,
|
||||
|
@ -2335,74 +2305,25 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
|
|||
if (lcd_ddc_info) {
|
||||
ddc_type = RBIOS8(lcd_ddc_info + 2);
|
||||
switch (ddc_type) {
|
||||
case DDC_MONID:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus
|
||||
(rdev, RADEON_GPIO_MONID);
|
||||
break;
|
||||
case DDC_DVI:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus
|
||||
(rdev, RADEON_GPIO_DVI_DDC);
|
||||
break;
|
||||
case DDC_VGA:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus
|
||||
(rdev, RADEON_GPIO_VGA_DDC);
|
||||
break;
|
||||
case DDC_CRT2:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus
|
||||
(rdev, RADEON_GPIO_CRT2_DDC);
|
||||
break;
|
||||
case DDC_LCD:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus
|
||||
(rdev, RADEON_GPIOPAD_MASK);
|
||||
ddc_i2c.mask_clk_mask =
|
||||
RBIOS32(lcd_ddc_info + 3);
|
||||
ddc_i2c.mask_data_mask =
|
||||
RBIOS32(lcd_ddc_info + 7);
|
||||
ddc_i2c.a_clk_mask =
|
||||
RBIOS32(lcd_ddc_info + 3);
|
||||
ddc_i2c.a_data_mask =
|
||||
RBIOS32(lcd_ddc_info + 7);
|
||||
ddc_i2c.en_clk_mask =
|
||||
RBIOS32(lcd_ddc_info + 3);
|
||||
ddc_i2c.en_data_mask =
|
||||
RBIOS32(lcd_ddc_info + 7);
|
||||
ddc_i2c.y_clk_mask =
|
||||
RBIOS32(lcd_ddc_info + 3);
|
||||
ddc_i2c.y_data_mask =
|
||||
RBIOS32(lcd_ddc_info + 7);
|
||||
ddc_i2c.i2c_id = RADEON_I2C_LCD_ID;
|
||||
combios_setup_i2c_bus(rdev,
|
||||
DDC_LCD,
|
||||
RBIOS32(lcd_ddc_info + 3),
|
||||
RBIOS32(lcd_ddc_info + 7));
|
||||
radeon_i2c_add(rdev, &ddc_i2c, "LCD");
|
||||
break;
|
||||
case DDC_GPIO:
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus
|
||||
(rdev, RADEON_MDGPIO_MASK);
|
||||
ddc_i2c.mask_clk_mask =
|
||||
RBIOS32(lcd_ddc_info + 3);
|
||||
ddc_i2c.mask_data_mask =
|
||||
RBIOS32(lcd_ddc_info + 7);
|
||||
ddc_i2c.a_clk_mask =
|
||||
RBIOS32(lcd_ddc_info + 3);
|
||||
ddc_i2c.a_data_mask =
|
||||
RBIOS32(lcd_ddc_info + 7);
|
||||
ddc_i2c.en_clk_mask =
|
||||
RBIOS32(lcd_ddc_info + 3);
|
||||
ddc_i2c.en_data_mask =
|
||||
RBIOS32(lcd_ddc_info + 7);
|
||||
ddc_i2c.y_clk_mask =
|
||||
RBIOS32(lcd_ddc_info + 3);
|
||||
ddc_i2c.y_data_mask =
|
||||
RBIOS32(lcd_ddc_info + 7);
|
||||
ddc_i2c.i2c_id = RADEON_I2C_LCD_ID;
|
||||
combios_setup_i2c_bus(rdev,
|
||||
DDC_GPIO,
|
||||
RBIOS32(lcd_ddc_info + 3),
|
||||
RBIOS32(lcd_ddc_info + 7));
|
||||
radeon_i2c_add(rdev, &ddc_i2c, "LCD");
|
||||
break;
|
||||
default:
|
||||
ddc_i2c.valid = false;
|
||||
ddc_i2c =
|
||||
combios_setup_i2c_bus(rdev, ddc_type, 0, 0);
|
||||
break;
|
||||
}
|
||||
DRM_DEBUG_KMS("LCD DDC Info Table found!\n");
|
||||
|
|
Loading…
Reference in a new issue