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ASoC: fsl_sai: Fix pins setting for i.MX8QM platform
commit238787157d
upstream. SAI on i.MX8QM platform supports the data lines up to 4. So the pins setting should be corrected to 4. Fixes:eba0f00775
("ASoC: fsl_sai: Enable combine mode soft") Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Acked-by: Shengjiu Wang <shengjiu.wang@gmail.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Link: https://lore.kernel.org/r/20230418094259.4150771-1-chancel.liu@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1541,7 +1541,7 @@ static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = {
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.use_imx_pcm = true,
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.use_edma = true,
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.fifo_depth = 64,
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.pins = 1,
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.pins = 4,
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.reg_offset = 0,
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.mclk0_is_mclk1 = false,
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.flags = 0,
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