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staging: r8188eu: Add files for new driver - part 11
This commit adds files hal/HalPwrSeqCmd.c, hal/odm.c, and hal/odm_debug.c. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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3 changed files with 2335 additions and 0 deletions
132
drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
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132
drivers/staging/rtl8188eu/hal/HalPwrSeqCmd.c
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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/*++
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Copyright (c) Realtek Semiconductor Corp. All rights reserved.
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Module Name:
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HalPwrSeqCmd.c
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Abstract:
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Implement HW Power sequence configuration CMD handling routine for Realtek devices.
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Major Change History:
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When Who What
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---------- --------------- -------------------------------
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2011-10-26 Lucas Modify to be compatible with SD4-CE driver.
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2011-07-07 Roger Create.
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--*/
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#include <HalPwrSeqCmd.h>
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/* Description: */
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/* This routine deals with the Power Configuration CMDs parsing
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* for RTL8723/RTL8188E Series IC.
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* Assumption:
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* We should follow specific format which was released from HW SD.
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*/
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u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
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u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
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{
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struct wl_pwr_cfg pwrcfgcmd = {0};
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u8 poll_bit = false;
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u32 aryidx = 0;
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u8 value = 0;
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u32 offset = 0;
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u32 poll_count = 0; /* polling autoload done. */
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u32 max_poll_count = 5000;
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do {
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pwrcfgcmd = pwrseqcmd[aryidx];
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RT_TRACE(_module_hal_init_c_ , _drv_info_,
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("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
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GET_PWR_CFG_OFFSET(pwrcfgcmd),
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GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
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GET_PWR_CFG_FAB_MASK(pwrcfgcmd),
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GET_PWR_CFG_INTF_MASK(pwrcfgcmd),
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GET_PWR_CFG_BASE(pwrcfgcmd),
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GET_PWR_CFG_CMD(pwrcfgcmd),
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GET_PWR_CFG_MASK(pwrcfgcmd),
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GET_PWR_CFG_VALUE(pwrcfgcmd)));
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/* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
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if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd) & fab_vers) &&
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(GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) &&
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(GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) {
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switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
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case PWR_CMD_READ:
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RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
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break;
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case PWR_CMD_WRITE:
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RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
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offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
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/* Read the value from system register */
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value = rtw_read8(padapter, offset);
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value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
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value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd));
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/* Write the value back to sytem register */
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rtw_write8(padapter, offset, value);
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break;
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case PWR_CMD_POLLING:
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RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
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poll_bit = false;
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offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
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do {
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value = rtw_read8(padapter, offset);
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value &= GET_PWR_CFG_MASK(pwrcfgcmd);
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if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)))
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poll_bit = true;
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else
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rtw_udelay_os(10);
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if (poll_count++ > max_poll_count) {
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DBG_88E("Fail to polling Offset[%#x]\n", offset);
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return false;
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}
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} while (!poll_bit);
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break;
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case PWR_CMD_DELAY:
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RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
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if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
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rtw_udelay_os(GET_PWR_CFG_OFFSET(pwrcfgcmd));
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else
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rtw_udelay_os(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
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break;
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case PWR_CMD_END:
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/* When this command is parsed, end the process */
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RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
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return true;
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break;
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default:
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RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
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break;
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}
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}
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aryidx++;/* Add Array Index */
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} while (1);
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return true;
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}
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2171
drivers/staging/rtl8188eu/hal/odm.c
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2171
drivers/staging/rtl8188eu/hal/odm.c
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File diff suppressed because it is too large
Load diff
32
drivers/staging/rtl8188eu/hal/odm_debug.c
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32
drivers/staging/rtl8188eu/hal/odm_debug.c
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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/* include files */
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#include "odm_precomp.h"
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void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
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{
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pDM_Odm->DebugLevel = ODM_DBG_TRACE;
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pDM_Odm->DebugComponents = 0;
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}
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u32 GlobalDebugLevel;
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