net: dsa: mv88e6xxx: pass mv88e6xxx_chip structure to port_max_speed_mode

Some switches families have minor differences on supported link speed for
ports. Instead of redefining a new port_max_speed_mode for each different
configuration, allow to pass mv88e6xxx_chip structure to allow
differentiating those chips by known chip id

Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Alexis Lothoré 2023-05-29 10:02:45 +02:00 committed by Jakub Kicinski
parent 2f93493970
commit 18e1b7422d
4 changed files with 19 additions and 10 deletions

View file

@ -3334,7 +3334,7 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
caps = pl_config.mac_capabilities;
if (chip->info->ops->port_max_speed_mode)
mode = chip->info->ops->port_max_speed_mode(port);
mode = chip->info->ops->port_max_speed_mode(chip, port);
else
mode = PHY_INTERFACE_MODE_NA;

View file

@ -518,7 +518,8 @@ struct mv88e6xxx_ops {
int speed, int duplex);
/* What interface mode should be used for maximum speed? */
phy_interface_t (*port_max_speed_mode)(int port);
phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,
int port);
int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);

View file

@ -342,7 +342,8 @@ int mv88e6341_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
duplex);
}
phy_interface_t mv88e6341_port_max_speed_mode(int port)
phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
int port)
{
if (port == 5)
return PHY_INTERFACE_MODE_2500BASEX;
@ -381,7 +382,8 @@ int mv88e6390_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
duplex);
}
phy_interface_t mv88e6390_port_max_speed_mode(int port)
phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
int port)
{
if (port == 9 || port == 10)
return PHY_INTERFACE_MODE_2500BASEX;
@ -403,7 +405,8 @@ int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
duplex);
}
phy_interface_t mv88e6390x_port_max_speed_mode(int port)
phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
int port)
{
if (port == 9 || port == 10)
return PHY_INTERFACE_MODE_XAUI;
@ -500,7 +503,8 @@ int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
return 0;
}
phy_interface_t mv88e6393x_port_max_speed_mode(int port)
phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
int port)
{
if (port == 0 || port == 9 || port == 10)
return PHY_INTERFACE_MODE_10GBASER;

View file

@ -359,10 +359,14 @@ int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
int speed, int duplex);
phy_interface_t mv88e6341_port_max_speed_mode(int port);
phy_interface_t mv88e6390_port_max_speed_mode(int port);
phy_interface_t mv88e6390x_port_max_speed_mode(int port);
phy_interface_t mv88e6393x_port_max_speed_mode(int port);
phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,
int port);
phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,
int port);
phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
int port);
phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,
int port);
int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);