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thermal: exynos: Add hardware mode thermal calibration support
This patch adds support for h/w mode calibration in the TMU controller. Soc's like 5440 support this features. The h/w bits needed for calibration setting are same as that of enum calibration_type. Acked-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
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parent
5000806c11
commit
1928457ea6
4 changed files with 44 additions and 1 deletions
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@ -73,6 +73,9 @@ static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
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struct exynos_tmu_platform_data *pdata = data->pdata;
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int temp_code;
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if (pdata->cal_mode == HW_MODE)
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return temp;
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if (data->soc == SOC_ARCH_EXYNOS4210)
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/* temp should range between 25 and 125 */
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if (temp < 25 || temp > 125) {
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@ -107,6 +110,9 @@ static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
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struct exynos_tmu_platform_data *pdata = data->pdata;
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int temp;
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if (pdata->cal_mode == HW_MODE)
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return temp_code;
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if (data->soc == SOC_ARCH_EXYNOS4210)
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/* temp_code should range between 75 and 175 */
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if (temp_code < 75 || temp_code > 175) {
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@ -155,6 +161,9 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
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if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
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__raw_writel(1, data->base + reg->triminfo_ctrl);
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if (pdata->cal_mode == HW_MODE)
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goto skip_calib_data;
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/* Save trimming info in order to perform calibration */
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if (data->soc == SOC_ARCH_EXYNOS5440) {
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/*
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@ -190,6 +199,7 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
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(pdata->efuse_value >> reg->triminfo_85_shift) &
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EXYNOS_TMU_TEMP_MASK;
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skip_calib_data:
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if (pdata->max_trigger_level > MAX_THRESHOLD_LEVS) {
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dev_err(&pdev->dev, "Invalid max trigger level\n");
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goto out;
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@ -297,7 +307,7 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on)
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struct exynos_tmu_data *data = platform_get_drvdata(pdev);
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struct exynos_tmu_platform_data *pdata = data->pdata;
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const struct exynos_tmu_registers *reg = pdata->registers;
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unsigned int con, interrupt_en;
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unsigned int con, interrupt_en, cal_val;
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mutex_lock(&data->lock);
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clk_enable(data->clk);
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@ -320,6 +330,27 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on)
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con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift);
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}
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if (pdata->cal_mode == HW_MODE) {
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con &= ~(reg->calib_mode_mask << reg->calib_mode_shift);
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cal_val = 0;
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switch (pdata->cal_type) {
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case TYPE_TWO_POINT_TRIMMING:
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cal_val = 3;
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break;
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case TYPE_ONE_POINT_TRIMMING_85:
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cal_val = 2;
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break;
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case TYPE_ONE_POINT_TRIMMING_25:
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cal_val = 1;
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break;
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case TYPE_NONE:
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break;
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default:
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dev_err(&pdev->dev, "Invalid calibration type, using none\n");
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}
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con |= cal_val << reg->calib_mode_shift;
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}
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if (on) {
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con |= (1 << reg->core_en_shift);
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interrupt_en =
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@ -28,6 +28,8 @@
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enum calibration_type {
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TYPE_ONE_POINT_TRIMMING,
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TYPE_ONE_POINT_TRIMMING_25,
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TYPE_ONE_POINT_TRIMMING_85,
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TYPE_TWO_POINT_TRIMMING,
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TYPE_NONE,
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};
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@ -90,6 +92,10 @@ enum soc_type {
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* @buf_slope_sel_shift: shift bits of amplifier gain value in tmu_ctrl
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register.
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* @buf_slope_sel_mask: mask bits of amplifier gain value in tmu_ctrl register.
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* @calib_mode_shift: shift bits of calibration mode value in tmu_ctrl
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register.
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* @calib_mode_mask: mask bits of calibration mode value in tmu_ctrl
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register.
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* @therm_trip_tq_en_shift: shift bits of thermal trip enable by TQ pin in
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tmu_ctrl register.
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* @core_en_shift: shift bits of TMU core enable bit in tmu_ctrl register.
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@ -151,6 +157,8 @@ struct exynos_tmu_registers {
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u32 therm_trip_en_shift;
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u32 buf_slope_sel_shift;
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u32 buf_slope_sel_mask;
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u32 calib_mode_shift;
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u32 calib_mode_mask;
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u32 therm_trip_tq_en_shift;
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u32 core_en_shift;
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@ -189,6 +189,8 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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.buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
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.buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
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.calib_mode_shift = EXYNOS_TMU_CALIB_MODE_SHIFT,
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.calib_mode_mask = EXYNOS_TMU_CALIB_MODE_MASK,
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.core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
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.tmu_status = EXYNOS5440_TMU_S0_7_STATUS,
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.tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,
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@ -75,6 +75,8 @@
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#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
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#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
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#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
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#define EXYNOS_TMU_CALIB_MODE_SHIFT 4
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#define EXYNOS_TMU_CALIB_MODE_MASK 0x3
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#define EXYNOS_TMU_INTEN_RISE0_SHIFT 0
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#define EXYNOS_TMU_INTEN_RISE1_SHIFT 4
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