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Staging: sm750fb: Insert spaces after commas in two files.
Insert Spaces after commas to rectify the following checkpatch errors in ddk750_help.c and ddk750_mode.c: ERROR: space required after that ',' Signed-off-by: Isaac Assegai <isaac.a.travers@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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parent
f31b55ac2a
commit
195d2b643b
2 changed files with 28 additions and 28 deletions
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@ -7,7 +7,7 @@ char revId750 = 0;
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unsigned short devId750 = 0;
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/* after driver mapped io registers, use this function first */
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void ddk750_set_mmio(void __iomem * addr,unsigned short devId,char revId)
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void ddk750_set_mmio(void __iomem * addr, unsigned short devId, char revId)
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{
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mmio750 = addr;
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devId750 = devId;
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@ -75,15 +75,15 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam,
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/* only timing related registers will be programed */
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static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
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static int programModeRegisters(mode_parameter_t * pModeParam, pll_value_t * pll)
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{
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int ret = 0;
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int cnt = 0;
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unsigned int ulTmpValue,ulReg;
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unsigned int ulTmpValue, ulReg;
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if(pll->clockType == SECONDARY_PLL)
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{
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/* programe secondary pixel clock */
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POKE32(CRT_PLL_CTRL,formatPllReg(pll));
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POKE32(CRT_PLL_CTRL, formatPllReg(pll));
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POKE32(CRT_HORIZONTAL_TOTAL,
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FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1)
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| FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1));
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@ -101,29 +101,29 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
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| FIELD_VALUE(0, CRT_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1));
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ulTmpValue = FIELD_VALUE(0,CRT_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)|
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FIELD_VALUE(0,CRT_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)|
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FIELD_SET(0,CRT_DISPLAY_CTRL,TIMING,ENABLE)|
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FIELD_SET(0,CRT_DISPLAY_CTRL,PLANE,ENABLE);
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ulTmpValue = FIELD_VALUE(0, CRT_DISPLAY_CTRL, VSYNC_PHASE, pModeParam->vertical_sync_polarity)|
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FIELD_VALUE(0, CRT_DISPLAY_CTRL, HSYNC_PHASE, pModeParam->horizontal_sync_polarity)|
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FIELD_SET(0, CRT_DISPLAY_CTRL, TIMING, ENABLE)|
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FIELD_SET(0, CRT_DISPLAY_CTRL, PLANE, ENABLE);
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if(getChipType() == SM750LE){
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displayControlAdjust_SM750LE(pModeParam,ulTmpValue);
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displayControlAdjust_SM750LE(pModeParam, ulTmpValue);
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}else{
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ulReg = PEEK32(CRT_DISPLAY_CTRL)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL,VSYNC_PHASE)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL,HSYNC_PHASE)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL,TIMING)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL,PLANE);
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& FIELD_CLEAR(CRT_DISPLAY_CTRL, VSYNC_PHASE)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL, HSYNC_PHASE)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL, TIMING)
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& FIELD_CLEAR(CRT_DISPLAY_CTRL, PLANE);
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POKE32(CRT_DISPLAY_CTRL,ulTmpValue|ulReg);
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POKE32(CRT_DISPLAY_CTRL, ulTmpValue|ulReg);
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}
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}
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else if(pll->clockType == PRIMARY_PLL)
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{
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unsigned int ulReservedBits;
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POKE32(PANEL_PLL_CTRL,formatPllReg(pll));
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POKE32(PANEL_PLL_CTRL, formatPllReg(pll));
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POKE32(PANEL_HORIZONTAL_TOTAL,
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FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1)
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@ -141,16 +141,16 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
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FIELD_VALUE(0, PANEL_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height)
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| FIELD_VALUE(0, PANEL_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1));
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ulTmpValue = FIELD_VALUE(0,PANEL_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)|
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FIELD_VALUE(0,PANEL_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)|
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FIELD_VALUE(0,PANEL_DISPLAY_CTRL,CLOCK_PHASE,pModeParam->clock_phase_polarity)|
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FIELD_SET(0,PANEL_DISPLAY_CTRL,TIMING,ENABLE)|
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FIELD_SET(0,PANEL_DISPLAY_CTRL,PLANE,ENABLE);
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ulTmpValue = FIELD_VALUE(0, PANEL_DISPLAY_CTRL, VSYNC_PHASE, pModeParam->vertical_sync_polarity)|
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FIELD_VALUE(0, PANEL_DISPLAY_CTRL, HSYNC_PHASE, pModeParam->horizontal_sync_polarity)|
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FIELD_VALUE(0, PANEL_DISPLAY_CTRL, CLOCK_PHASE, pModeParam->clock_phase_polarity)|
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FIELD_SET(0, PANEL_DISPLAY_CTRL, TIMING, ENABLE)|
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FIELD_SET(0, PANEL_DISPLAY_CTRL, PLANE, ENABLE);
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ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) |
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FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) |
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FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE)|
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FIELD_SET(0,PANEL_DISPLAY_CTRL,VSYNC,ACTIVE_LOW);
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FIELD_SET(0, PANEL_DISPLAY_CTRL, VSYNC, ACTIVE_LOW);
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ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits)
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& FIELD_CLEAR(PANEL_DISPLAY_CTRL, CLOCK_PHASE)
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@ -168,14 +168,14 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
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* next vertical sync to turn on/off the plane.
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*/
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POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg);
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POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
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#if 1
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while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg))
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{
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cnt++;
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if(cnt > 1000)
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break;
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POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg);
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POKE32(PANEL_DISPLAY_CTRL, ulTmpValue|ulReg);
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}
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#endif
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}
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@ -185,20 +185,20 @@ static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
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return ret;
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}
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int ddk750_setModeTiming(mode_parameter_t * parm,clock_type_t clock)
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int ddk750_setModeTiming(mode_parameter_t * parm, clock_type_t clock)
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{
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pll_value_t pll;
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unsigned int uiActualPixelClk;
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pll.inputFreq = DEFAULT_INPUT_CLOCK;
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pll.clockType = clock;
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uiActualPixelClk = calcPllValue(parm->pixel_clock,&pll);
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uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll);
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if(getChipType() == SM750LE){
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/* set graphic mode via IO method */
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outb_p(0x88,0x3d4);
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outb_p(0x06,0x3d5);
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outb_p(0x88, 0x3d4);
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outb_p(0x06, 0x3d5);
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}
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programModeRegisters(parm,&pll);
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programModeRegisters(parm, &pll);
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return 0;
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}
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