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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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[ARM] sa1111: allow cascaded IRQs to be used by platforms
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
This commit is contained in:
parent
08fa159003
commit
19851c58e6
8 changed files with 116 additions and 130 deletions
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@ -35,6 +35,58 @@
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#include <asm/hardware/sa1111.h>
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/* SA1111 IRQs */
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#define IRQ_GPAIN0 (0)
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#define IRQ_GPAIN1 (1)
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#define IRQ_GPAIN2 (2)
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#define IRQ_GPAIN3 (3)
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#define IRQ_GPBIN0 (4)
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#define IRQ_GPBIN1 (5)
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#define IRQ_GPBIN2 (6)
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#define IRQ_GPBIN3 (7)
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#define IRQ_GPBIN4 (8)
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#define IRQ_GPBIN5 (9)
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#define IRQ_GPCIN0 (10)
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#define IRQ_GPCIN1 (11)
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#define IRQ_GPCIN2 (12)
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#define IRQ_GPCIN3 (13)
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#define IRQ_GPCIN4 (14)
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#define IRQ_GPCIN5 (15)
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#define IRQ_GPCIN6 (16)
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#define IRQ_GPCIN7 (17)
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#define IRQ_MSTXINT (18)
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#define IRQ_MSRXINT (19)
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#define IRQ_MSSTOPERRINT (20)
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#define IRQ_TPTXINT (21)
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#define IRQ_TPRXINT (22)
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#define IRQ_TPSTOPERRINT (23)
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#define SSPXMTINT (24)
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#define SSPRCVINT (25)
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#define SSPROR (26)
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#define AUDXMTDMADONEA (32)
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#define AUDRCVDMADONEA (33)
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#define AUDXMTDMADONEB (34)
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#define AUDRCVDMADONEB (35)
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#define AUDTFSR (36)
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#define AUDRFSR (37)
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#define AUDTUR (38)
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#define AUDROR (39)
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#define AUDDTS (40)
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#define AUDRDD (41)
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#define AUDSTO (42)
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#define IRQ_USBPWR (43)
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#define IRQ_HCIM (44)
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#define IRQ_HCIBUFFACC (45)
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#define IRQ_HCIRMTWKP (46)
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#define IRQ_NHCIMFCIR (47)
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#define IRQ_USB_PORT_RESUME (48)
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#define IRQ_S0_READY_NINT (49)
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#define IRQ_S1_READY_NINT (50)
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#define IRQ_S0_CD_VALID (51)
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#define IRQ_S1_CD_VALID (52)
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#define IRQ_S0_BVD1_STSCHG (53)
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#define IRQ_S1_BVD1_STSCHG (54)
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extern void __init sa1110_mb_enable(void);
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/*
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@ -49,6 +101,7 @@ struct sa1111 {
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struct clk *clk;
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unsigned long phys;
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int irq;
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int irq_base; /* base for cascaded on-chip IRQs */
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spinlock_t lock;
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void __iomem *base;
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#ifdef CONFIG_PM
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@ -152,36 +205,37 @@ static void
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sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
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{
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unsigned int stat0, stat1, i;
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void __iomem *base = get_irq_data(irq);
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struct sa1111 *sachip = get_irq_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
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stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
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stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
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stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
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sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
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sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
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desc->chip->ack(irq);
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sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
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sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
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if (stat0 == 0 && stat1 == 0) {
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do_bad_IRQ(irq, desc);
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return;
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}
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for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
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for (i = 0; stat0; i++, stat0 >>= 1)
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if (stat0 & 1)
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handle_edge_irq(i, irq_desc + i);
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generic_handle_irq(i + sachip->irq_base);
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for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
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for (i = 32; stat1; i++, stat1 >>= 1)
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if (stat1 & 1)
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handle_edge_irq(i, irq_desc + i);
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generic_handle_irq(i + sachip->irq_base);
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/* For level-based interrupts */
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desc->chip->unmask(irq);
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}
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#define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START))
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#define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32))
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#define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
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#define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
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static void sa1111_ack_irq(unsigned int irq)
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{
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@ -189,7 +243,8 @@ static void sa1111_ack_irq(unsigned int irq)
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static void sa1111_mask_lowirq(unsigned int irq)
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{
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void __iomem *mapbase = get_irq_chip_data(irq);
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned long ie0;
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ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
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@ -199,7 +254,8 @@ static void sa1111_mask_lowirq(unsigned int irq)
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static void sa1111_unmask_lowirq(unsigned int irq)
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{
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void __iomem *mapbase = get_irq_chip_data(irq);
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned long ie0;
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ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
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@ -216,8 +272,9 @@ static void sa1111_unmask_lowirq(unsigned int irq)
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*/
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static int sa1111_retrigger_lowirq(unsigned int irq)
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{
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned int mask = SA1111_IRQMASK_LO(irq);
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void __iomem *mapbase = get_irq_chip_data(irq);
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unsigned long ip0;
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int i;
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@ -237,8 +294,9 @@ static int sa1111_retrigger_lowirq(unsigned int irq)
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static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
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{
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned int mask = SA1111_IRQMASK_LO(irq);
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void __iomem *mapbase = get_irq_chip_data(irq);
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unsigned long ip0;
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if (flags == IRQ_TYPE_PROBE)
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@ -260,8 +318,9 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
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static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
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{
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned int mask = SA1111_IRQMASK_LO(irq);
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void __iomem *mapbase = get_irq_chip_data(irq);
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unsigned long we0;
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we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
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@ -286,7 +345,8 @@ static struct irq_chip sa1111_low_chip = {
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static void sa1111_mask_highirq(unsigned int irq)
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{
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void __iomem *mapbase = get_irq_chip_data(irq);
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned long ie1;
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ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
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@ -296,7 +356,8 @@ static void sa1111_mask_highirq(unsigned int irq)
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static void sa1111_unmask_highirq(unsigned int irq)
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{
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void __iomem *mapbase = get_irq_chip_data(irq);
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned long ie1;
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ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
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*/
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static int sa1111_retrigger_highirq(unsigned int irq)
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{
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned int mask = SA1111_IRQMASK_HI(irq);
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void __iomem *mapbase = get_irq_chip_data(irq);
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unsigned long ip1;
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int i;
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@ -334,8 +396,9 @@ static int sa1111_retrigger_highirq(unsigned int irq)
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static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
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{
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned int mask = SA1111_IRQMASK_HI(irq);
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void __iomem *mapbase = get_irq_chip_data(irq);
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unsigned long ip1;
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if (flags == IRQ_TYPE_PROBE)
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@ -357,8 +420,9 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
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static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
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{
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struct sa1111 *sachip = get_irq_chip_data(irq);
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void __iomem *mapbase = sachip->base + SA1111_INTC;
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unsigned int mask = SA1111_IRQMASK_HI(irq);
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void __iomem *mapbase = get_irq_chip_data(irq);
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unsigned long we1;
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we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
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@ -412,14 +476,14 @@ static void sa1111_setup_irq(struct sa1111 *sachip)
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for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
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set_irq_chip(irq, &sa1111_low_chip);
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set_irq_chip_data(irq, irqbase);
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set_irq_chip_data(irq, sachip);
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set_irq_handler(irq, handle_edge_irq);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
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set_irq_chip(irq, &sa1111_high_chip);
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set_irq_chip_data(irq, irqbase);
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set_irq_chip_data(irq, sachip);
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set_irq_handler(irq, handle_edge_irq);
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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* Register SA1111 interrupt
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*/
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set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
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set_irq_data(sachip->irq, irqbase);
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set_irq_data(sachip->irq, sachip);
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set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
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}
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@ -578,4 +578,8 @@ void sa1111_set_io_dir(struct sa1111_dev *sadev, unsigned int bits, unsigned int
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void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
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void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v);
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struct sa1111_platform_data {
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int irq_base; /* base for cascaded on-chip IRQs */
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};
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#endif /* _ASM_ARCH_SA1111 */
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@ -135,58 +135,6 @@
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#define IRQ_BOARD_END (IRQ_BOARD_START + 16)
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#endif
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#define IRQ_SA1111_START (IRQ_BOARD_END)
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#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
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#define IRQ_GPAIN1 (IRQ_BOARD_END + 1)
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#define IRQ_GPAIN2 (IRQ_BOARD_END + 2)
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#define IRQ_GPAIN3 (IRQ_BOARD_END + 3)
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#define IRQ_GPBIN0 (IRQ_BOARD_END + 4)
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#define IRQ_GPBIN1 (IRQ_BOARD_END + 5)
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#define IRQ_GPBIN2 (IRQ_BOARD_END + 6)
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#define IRQ_GPBIN3 (IRQ_BOARD_END + 7)
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#define IRQ_GPBIN4 (IRQ_BOARD_END + 8)
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#define IRQ_GPBIN5 (IRQ_BOARD_END + 9)
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#define IRQ_GPCIN0 (IRQ_BOARD_END + 10)
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#define IRQ_GPCIN1 (IRQ_BOARD_END + 11)
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#define IRQ_GPCIN2 (IRQ_BOARD_END + 12)
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#define IRQ_GPCIN3 (IRQ_BOARD_END + 13)
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#define IRQ_GPCIN4 (IRQ_BOARD_END + 14)
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#define IRQ_GPCIN5 (IRQ_BOARD_END + 15)
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#define IRQ_GPCIN6 (IRQ_BOARD_END + 16)
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#define IRQ_GPCIN7 (IRQ_BOARD_END + 17)
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#define IRQ_MSTXINT (IRQ_BOARD_END + 18)
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#define IRQ_MSRXINT (IRQ_BOARD_END + 19)
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#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20)
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#define IRQ_TPTXINT (IRQ_BOARD_END + 21)
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#define IRQ_TPRXINT (IRQ_BOARD_END + 22)
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#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23)
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#define SSPXMTINT (IRQ_BOARD_END + 24)
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#define SSPRCVINT (IRQ_BOARD_END + 25)
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#define SSPROR (IRQ_BOARD_END + 26)
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#define AUDXMTDMADONEA (IRQ_BOARD_END + 32)
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#define AUDRCVDMADONEA (IRQ_BOARD_END + 33)
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#define AUDXMTDMADONEB (IRQ_BOARD_END + 34)
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#define AUDRCVDMADONEB (IRQ_BOARD_END + 35)
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#define AUDTFSR (IRQ_BOARD_END + 36)
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#define AUDRFSR (IRQ_BOARD_END + 37)
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#define AUDTUR (IRQ_BOARD_END + 38)
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#define AUDROR (IRQ_BOARD_END + 39)
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#define AUDDTS (IRQ_BOARD_END + 40)
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#define AUDRDD (IRQ_BOARD_END + 41)
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#define AUDSTO (IRQ_BOARD_END + 42)
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#define IRQ_USBPWR (IRQ_BOARD_END + 43)
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#define IRQ_HCIM (IRQ_BOARD_END + 44)
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#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45)
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#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46)
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#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47)
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#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48)
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#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49)
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#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50)
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#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51)
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#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52)
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#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53)
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#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54)
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/*
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* Figure out the MAX IRQ number.
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*
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* Otherwise, we have the standard IRQs only.
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*/
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#ifdef CONFIG_SA1111
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#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1)
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#define NR_IRQS (IRQ_BOARD_END + 55)
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#elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
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#define NR_IRQS (IRQ_BOARD_END)
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#else
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},
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};
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static struct sa1111_platform_data sa1111_info = {
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.irq_base = IRQ_BOARD_END,
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};
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static struct platform_device sa1111_device = {
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.name = "sa1111",
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.id = -1,
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.num_resources = ARRAY_SIZE(sa1111_resources),
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.resource = sa1111_resources,
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.dev = {
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.platform_data = &sa1111_info,
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},
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};
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/* ADS7846 is connected through SSP ... and if your board has J5 populated,
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@ -51,6 +51,10 @@ static struct resource sa1111_resources[] = {
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},
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};
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static struct sa1111_platform_data sa1111_info = {
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.irq_base = IRQ_BOARD_END,
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};
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static u64 sa1111_dmamask = 0xffffffffUL;
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static struct platform_device sa1111_device = {
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.dev = {
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.dma_mask = &sa1111_dmamask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &sa1111_info,
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},
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.num_resources = ARRAY_SIZE(sa1111_resources),
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.resource = sa1111_resources,
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#define IRQ_BOARD_START 49
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#define IRQ_BOARD_END 65
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#define IRQ_SA1111_START (IRQ_BOARD_END)
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#define IRQ_GPAIN0 (IRQ_BOARD_END + 0)
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#define IRQ_GPAIN1 (IRQ_BOARD_END + 1)
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#define IRQ_GPAIN2 (IRQ_BOARD_END + 2)
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#define IRQ_GPAIN3 (IRQ_BOARD_END + 3)
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#define IRQ_GPBIN0 (IRQ_BOARD_END + 4)
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#define IRQ_GPBIN1 (IRQ_BOARD_END + 5)
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#define IRQ_GPBIN2 (IRQ_BOARD_END + 6)
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#define IRQ_GPBIN3 (IRQ_BOARD_END + 7)
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#define IRQ_GPBIN4 (IRQ_BOARD_END + 8)
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||||
#define IRQ_GPBIN5 (IRQ_BOARD_END + 9)
|
||||
#define IRQ_GPCIN0 (IRQ_BOARD_END + 10)
|
||||
#define IRQ_GPCIN1 (IRQ_BOARD_END + 11)
|
||||
#define IRQ_GPCIN2 (IRQ_BOARD_END + 12)
|
||||
#define IRQ_GPCIN3 (IRQ_BOARD_END + 13)
|
||||
#define IRQ_GPCIN4 (IRQ_BOARD_END + 14)
|
||||
#define IRQ_GPCIN5 (IRQ_BOARD_END + 15)
|
||||
#define IRQ_GPCIN6 (IRQ_BOARD_END + 16)
|
||||
#define IRQ_GPCIN7 (IRQ_BOARD_END + 17)
|
||||
#define IRQ_MSTXINT (IRQ_BOARD_END + 18)
|
||||
#define IRQ_MSRXINT (IRQ_BOARD_END + 19)
|
||||
#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20)
|
||||
#define IRQ_TPTXINT (IRQ_BOARD_END + 21)
|
||||
#define IRQ_TPRXINT (IRQ_BOARD_END + 22)
|
||||
#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23)
|
||||
#define SSPXMTINT (IRQ_BOARD_END + 24)
|
||||
#define SSPRCVINT (IRQ_BOARD_END + 25)
|
||||
#define SSPROR (IRQ_BOARD_END + 26)
|
||||
#define AUDXMTDMADONEA (IRQ_BOARD_END + 32)
|
||||
#define AUDRCVDMADONEA (IRQ_BOARD_END + 33)
|
||||
#define AUDXMTDMADONEB (IRQ_BOARD_END + 34)
|
||||
#define AUDRCVDMADONEB (IRQ_BOARD_END + 35)
|
||||
#define AUDTFSR (IRQ_BOARD_END + 36)
|
||||
#define AUDRFSR (IRQ_BOARD_END + 37)
|
||||
#define AUDTUR (IRQ_BOARD_END + 38)
|
||||
#define AUDROR (IRQ_BOARD_END + 39)
|
||||
#define AUDDTS (IRQ_BOARD_END + 40)
|
||||
#define AUDRDD (IRQ_BOARD_END + 41)
|
||||
#define AUDSTO (IRQ_BOARD_END + 42)
|
||||
#define IRQ_USBPWR (IRQ_BOARD_END + 43)
|
||||
#define IRQ_HCIM (IRQ_BOARD_END + 44)
|
||||
#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45)
|
||||
#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46)
|
||||
#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47)
|
||||
#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48)
|
||||
#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49)
|
||||
#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50)
|
||||
#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51)
|
||||
#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52)
|
||||
#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53)
|
||||
#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54)
|
||||
|
||||
/*
|
||||
* Figure out the MAX IRQ number.
|
||||
*
|
||||
|
@ -128,7 +76,7 @@
|
|||
* Otherwise, we have the standard IRQs only.
|
||||
*/
|
||||
#ifdef CONFIG_SA1111
|
||||
#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1)
|
||||
#define NR_IRQS (IRQ_BOARD_END + 55)
|
||||
#elif defined(CONFIG_SHARPSL_LOCOMO)
|
||||
#define NR_IRQS (IRQ_BOARD_START + 4)
|
||||
#else
|
||||
|
|
|
@ -208,6 +208,10 @@ static struct resource sa1111_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct sa1111_platform_data sa1111_info = {
|
||||
.irq_base = IRQ_BOARD_END,
|
||||
};
|
||||
|
||||
static u64 sa1111_dmamask = 0xffffffffUL;
|
||||
|
||||
static struct platform_device sa1111_device = {
|
||||
|
@ -216,6 +220,7 @@ static struct platform_device sa1111_device = {
|
|||
.dev = {
|
||||
.dma_mask = &sa1111_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &sa1111_info,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(sa1111_resources),
|
||||
.resource = sa1111_resources,
|
||||
|
|
|
@ -241,6 +241,10 @@ static struct resource sa1111_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct sa1111_platform_data sa1111_info = {
|
||||
.irq_base = IRQ_BOARD_END,
|
||||
};
|
||||
|
||||
static u64 sa1111_dmamask = 0xffffffffUL;
|
||||
|
||||
static struct platform_device sa1111_device = {
|
||||
|
@ -249,6 +253,7 @@ static struct platform_device sa1111_device = {
|
|||
.dev = {
|
||||
.dma_mask = &sa1111_dmamask,
|
||||
.coherent_dma_mask = 0xffffffff,
|
||||
.platform_data = &sa1111_info,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(sa1111_resources),
|
||||
.resource = sa1111_resources,
|
||||
|
|
Loading…
Reference in a new issue