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drm/i915: Document BDW+ DRRS M/N programming requirements
When reprogramming M/N live on BDW+ we must write the LINK_N register last as it's the one that arms the double buffered register update for all the M/N registers. Document this so that we don't accidentally break things. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-18-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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@ -3152,6 +3152,10 @@ void intel_set_m_n(struct drm_i915_private *i915,
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intel_de_write(i915, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m);
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intel_de_write(i915, data_n_reg, m_n->data_n);
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intel_de_write(i915, link_m_reg, m_n->link_m);
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/*
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* On BDW+ writing LINK_N arms the double buffered update
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* of all the M/N registers, so it must be written last.
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*/
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intel_de_write(i915, link_n_reg, m_n->link_n);
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}
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