dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml

Convert spi-zynq-qspi.txt to yaml.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/4ece21a7e9691ed1e775fd6b0b4046b1562e44bd.1612951821.git.michal.simek@xilinx.com
Reviewed-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Michal Simek 2021-02-10 11:10:25 +01:00
parent 9cc5c6c156
commit 19e1f484a6
3 changed files with 60 additions and 25 deletions

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@ -1,25 +0,0 @@
Xilinx Zynq QSPI controller Device Tree Bindings
-------------------------------------------------------------------
Required properties:
- compatible : Should be "xlnx,zynq-qspi-1.0".
- reg : Physical base address and size of QSPI registers map.
- interrupts : Property with a value describing the interrupt
number.
- clock-names : List of input clock names - "ref_clk", "pclk"
(See clock bindings for details).
- clocks : Clock phandles (see clock bindings for details).
Optional properties:
- num-cs : Number of chip selects used.
Example:
qspi: spi@e000d000 {
compatible = "xlnx,zynq-qspi-1.0";
reg = <0xe000d000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <0 19 4>;
clock-names = "ref_clk", "pclk";
clocks = <&clkc 10>, <&clkc 43>;
num-cs = <1>;
};

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@ -0,0 +1,59 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx Zynq QSPI controller
description:
The Xilinx Zynq QSPI controller is used to access multi-bit serial flash
memory devices.
allOf:
- $ref: "spi-controller.yaml#"
maintainers:
- Michal Simek <michal.simek@xilinx.com>
# Everything else is described in the common file
properties:
compatible:
const: xlnx,zynq-qspi-1.0
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: reference clock
- description: peripheral clock
clock-names:
items:
- const: ref_clk
- const: pclk
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
spi@e000d000 {
compatible = "xlnx,zynq-qspi-1.0";
reg = <0xe000d000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <0 19 4>;
clock-names = "ref_clk", "pclk";
clocks = <&clkc 10>, <&clkc 43>;
num-cs = <1>;
};

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@ -2766,6 +2766,7 @@ W: http://wiki.xilinx.com
T: git https://github.com/Xilinx/linux-xlnx.git
F: Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
F: Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml
F: Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml
F: arch/arm/mach-zynq/
F: drivers/block/xsysace.c
F: drivers/clocksource/timer-cadence-ttc.c