mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 08:19:28 +00:00
clk: oxnas: Rename to clk_oxnas_gate
Rename clock ops to clk_oxnas_gate in ops and structures. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20161005150752.22618-4-narmstrong@baylibre.com
This commit is contained in:
parent
5881456295
commit
1a2cfd0070
1 changed files with 16 additions and 16 deletions
|
@ -26,7 +26,7 @@
|
||||||
#include <linux/mfd/syscon.h>
|
#include <linux/mfd/syscon.h>
|
||||||
|
|
||||||
/* Standard regmap gate clocks */
|
/* Standard regmap gate clocks */
|
||||||
struct clk_oxnas {
|
struct clk_oxnas_gate {
|
||||||
struct clk_hw hw;
|
struct clk_hw hw;
|
||||||
signed char bit;
|
signed char bit;
|
||||||
struct regmap *regmap;
|
struct regmap *regmap;
|
||||||
|
@ -37,14 +37,14 @@ struct clk_oxnas {
|
||||||
#define CLK_SET_REGOFFSET 0x2c
|
#define CLK_SET_REGOFFSET 0x2c
|
||||||
#define CLK_CLR_REGOFFSET 0x30
|
#define CLK_CLR_REGOFFSET 0x30
|
||||||
|
|
||||||
static inline struct clk_oxnas *to_clk_oxnas(struct clk_hw *hw)
|
static inline struct clk_oxnas_gate *to_clk_oxnas_gate(struct clk_hw *hw)
|
||||||
{
|
{
|
||||||
return container_of(hw, struct clk_oxnas, hw);
|
return container_of(hw, struct clk_oxnas_gate, hw);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int oxnas_clk_is_enabled(struct clk_hw *hw)
|
static int oxnas_clk_gate_is_enabled(struct clk_hw *hw)
|
||||||
{
|
{
|
||||||
struct clk_oxnas *std = to_clk_oxnas(hw);
|
struct clk_oxnas_gate *std = to_clk_oxnas_gate(hw);
|
||||||
int ret;
|
int ret;
|
||||||
unsigned int val;
|
unsigned int val;
|
||||||
|
|
||||||
|
@ -55,26 +55,26 @@ static int oxnas_clk_is_enabled(struct clk_hw *hw)
|
||||||
return val & BIT(std->bit);
|
return val & BIT(std->bit);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int oxnas_clk_enable(struct clk_hw *hw)
|
static int oxnas_clk_gate_enable(struct clk_hw *hw)
|
||||||
{
|
{
|
||||||
struct clk_oxnas *std = to_clk_oxnas(hw);
|
struct clk_oxnas_gate *std = to_clk_oxnas_gate(hw);
|
||||||
|
|
||||||
regmap_write(std->regmap, CLK_SET_REGOFFSET, BIT(std->bit));
|
regmap_write(std->regmap, CLK_SET_REGOFFSET, BIT(std->bit));
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void oxnas_clk_disable(struct clk_hw *hw)
|
static void oxnas_clk_gate_disable(struct clk_hw *hw)
|
||||||
{
|
{
|
||||||
struct clk_oxnas *std = to_clk_oxnas(hw);
|
struct clk_oxnas_gate *std = to_clk_oxnas_gate(hw);
|
||||||
|
|
||||||
regmap_write(std->regmap, CLK_CLR_REGOFFSET, BIT(std->bit));
|
regmap_write(std->regmap, CLK_CLR_REGOFFSET, BIT(std->bit));
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct clk_ops oxnas_clk_ops = {
|
static const struct clk_ops oxnas_clk_gate_ops = {
|
||||||
.enable = oxnas_clk_enable,
|
.enable = oxnas_clk_gate_enable,
|
||||||
.disable = oxnas_clk_disable,
|
.disable = oxnas_clk_gate_disable,
|
||||||
.is_enabled = oxnas_clk_is_enabled,
|
.is_enabled = oxnas_clk_gate_is_enabled,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const char *const oxnas_clk_parents[] = {
|
static const char *const oxnas_clk_parents[] = {
|
||||||
|
@ -88,7 +88,7 @@ static const char *const eth_parents[] = {
|
||||||
#define DECLARE_STD_CLKP(__clk, __parent) \
|
#define DECLARE_STD_CLKP(__clk, __parent) \
|
||||||
static const struct clk_init_data clk_##__clk##_init = { \
|
static const struct clk_init_data clk_##__clk##_init = { \
|
||||||
.name = __stringify(__clk), \
|
.name = __stringify(__clk), \
|
||||||
.ops = &oxnas_clk_ops, \
|
.ops = &oxnas_clk_gate_ops, \
|
||||||
.parent_names = __parent, \
|
.parent_names = __parent, \
|
||||||
.num_parents = ARRAY_SIZE(__parent), \
|
.num_parents = ARRAY_SIZE(__parent), \
|
||||||
}
|
}
|
||||||
|
@ -127,7 +127,7 @@ static const struct clk_oxnas_init_data clk_oxnas_init[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
struct clk_oxnas_data {
|
struct clk_oxnas_data {
|
||||||
struct clk_oxnas clk_oxnas[ARRAY_SIZE(clk_oxnas_init)];
|
struct clk_oxnas_gate clk_oxnas[ARRAY_SIZE(clk_oxnas_init)];
|
||||||
struct clk_onecell_data onecell_data[ARRAY_SIZE(clk_oxnas_init)];
|
struct clk_onecell_data onecell_data[ARRAY_SIZE(clk_oxnas_init)];
|
||||||
struct clk *clks[ARRAY_SIZE(clk_oxnas_init)];
|
struct clk *clks[ARRAY_SIZE(clk_oxnas_init)];
|
||||||
};
|
};
|
||||||
|
@ -150,7 +150,7 @@ static int oxnas_stdclk_probe(struct platform_device *pdev)
|
||||||
}
|
}
|
||||||
|
|
||||||
for (i = 0; i < ARRAY_SIZE(clk_oxnas_init); i++) {
|
for (i = 0; i < ARRAY_SIZE(clk_oxnas_init); i++) {
|
||||||
struct clk_oxnas *_clk;
|
struct clk_oxnas_gate *_clk;
|
||||||
|
|
||||||
_clk = &clk_oxnas->clk_oxnas[i];
|
_clk = &clk_oxnas->clk_oxnas[i];
|
||||||
_clk->bit = clk_oxnas_init[i].bit;
|
_clk->bit = clk_oxnas_init[i].bit;
|
||||||
|
|
Loading…
Reference in a new issue