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clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
Clocks that don't have a divider are in our case all marked with the CLK_SET_RATE_PARENT flag. In this case, the .round_rate implementation should modify the value pointed to by parent_rate, in order to propagate the rate change to the parent, as explained in the documentation of clk_set_rate(). Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20200903015048.3091523-5-paul@crapouillou.net Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -445,6 +445,8 @@ ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate,
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div = ingenic_clk_calc_div(clk_info, *parent_rate, req_rate);
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else if (clk_info->type & CGU_CLK_FIXDIV)
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div = clk_info->fixdiv.div;
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else if (clk_hw_can_set_rate_parent(hw))
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*parent_rate = req_rate;
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return DIV_ROUND_UP(*parent_rate, div);
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}
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