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drm/i915/selftests: Measure CS_TIMESTAMP
Count the number of CS_TIMESTAMP ticks and check that it matches our expectations. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200521071059.31726-1-chris@chris-wilson.co.uk
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@ -5,10 +5,141 @@
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* Copyright © 2019 Intel Corporation
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*/
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#include <linux/sort.h>
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#include "intel_gt_clock_utils.h"
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#include "selftest_llc.h"
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#include "selftest_rc6.h"
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#include "selftest_rps.h"
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static int cmp_u64(const void *A, const void *B)
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{
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const u64 *a = A, *b = B;
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if (a < b)
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return -1;
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else if (a > b)
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return 1;
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else
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return 0;
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}
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static int cmp_u32(const void *A, const void *B)
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{
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const u32 *a = A, *b = B;
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if (a < b)
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return -1;
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else if (a > b)
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return 1;
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else
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return 0;
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}
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static void measure_clocks(struct intel_engine_cs *engine,
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u32 *out_cycles, ktime_t *out_dt)
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{
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ktime_t dt[5];
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u32 cycles[5];
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int i;
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for (i = 0; i < 5; i++) {
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preempt_disable();
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cycles[i] = -ENGINE_READ_FW(engine, RING_TIMESTAMP);
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dt[i] = ktime_get();
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udelay(1000);
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dt[i] = ktime_sub(ktime_get(), dt[i]);
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cycles[i] += ENGINE_READ_FW(engine, RING_TIMESTAMP);
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preempt_enable();
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}
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/* Use the median of both cycle/dt; close enough */
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sort(cycles, 5, sizeof(*cycles), cmp_u32, NULL);
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*out_cycles = (cycles[1] + 2 * cycles[2] + cycles[3]) / 4;
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sort(dt, 5, sizeof(*dt), cmp_u64, NULL);
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*out_dt = div_u64(dt[1] + 2 * dt[2] + dt[3], 4);
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}
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static int live_gt_clocks(void *arg)
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{
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struct intel_gt *gt = arg;
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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int err = 0;
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if (!RUNTIME_INFO(gt->i915)->cs_timestamp_frequency_hz) { /* unknown */
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pr_info("CS_TIMESTAMP frequency unknown\n");
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return 0;
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}
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if (INTEL_GEN(gt->i915) < 4) /* Any CS_TIMESTAMP? */
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return 0;
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if (IS_GEN(gt->i915, 5))
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/*
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* XXX CS_TIMESTAMP low dword is dysfunctional?
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*
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* Ville's experiments indicate the high dword still works,
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* but at a correspondingly reduced frequency.
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*/
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return 0;
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if (IS_GEN(gt->i915, 4))
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/*
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* XXX CS_TIMESTAMP appears gibberish
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*
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* Ville's experiments indicate that it mostly appears 'stuck'
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* in that we see the register report the same cycle count
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* for a couple of reads.
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*/
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return 0;
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intel_gt_pm_get(gt);
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intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
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for_each_engine(engine, gt, id) {
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u32 cycles;
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u32 expected;
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u64 time;
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u64 dt;
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if (INTEL_GEN(engine->i915) < 7 && engine->id != RCS0)
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continue;
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measure_clocks(engine, &cycles, &dt);
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time = i915_cs_timestamp_ticks_to_ns(engine->i915, cycles);
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expected = i915_cs_timestamp_ns_to_ticks(engine->i915, dt);
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pr_info("%s: TIMESTAMP %d cycles [%lldns] in %lldns [%d cycles], using CS clock frequency of %uKHz\n",
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engine->name, cycles, time, dt, expected,
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RUNTIME_INFO(engine->i915)->cs_timestamp_frequency_hz / 1000);
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if (9 * time < 8 * dt || 8 * time > 9 * dt) {
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pr_err("%s: CS ticks did not match walltime!\n",
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engine->name);
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err = -EINVAL;
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break;
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}
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if (9 * expected < 8 * cycles || 8 * expected > 9 * cycles) {
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pr_err("%s: walltime did not match CS ticks!\n",
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engine->name);
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err = -EINVAL;
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break;
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}
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}
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intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
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intel_gt_pm_put(gt);
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return err;
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}
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static int live_gt_resume(void *arg)
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{
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struct intel_gt *gt = arg;
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@ -52,6 +183,7 @@ static int live_gt_resume(void *arg)
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int intel_gt_pm_live_selftests(struct drm_i915_private *i915)
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{
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static const struct i915_subtest tests[] = {
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SUBTEST(live_gt_clocks),
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SUBTEST(live_rc6_manual),
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SUBTEST(live_rps_clock_interval),
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SUBTEST(live_rps_control),
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