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clk: exynos5433: Fix CLK_PCLK_MONOTONIC_CNT clk register assignment
CLK_PCLK_MONOTONIC_CNT clock had a wrong register assigned to it. The correct register is ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT. Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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@ -1490,7 +1490,7 @@ static struct samsung_gate_clock mif_gate_clks[] __initdata = {
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/* ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT */
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/* ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT */
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GATE(CLK_PCLK_MONOTONIC_CNT, "pclk_monotonic_cnt", "div_aclk_mif_133",
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GATE(CLK_PCLK_MONOTONIC_CNT, "pclk_monotonic_cnt", "div_aclk_mif_133",
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ENABLE_PCLK_MIF_SECURE_RTC, 0, 0, 0),
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ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT, 0, 0, 0),
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/* ENABLE_PCLK_MIF_SECURE_RTC */
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/* ENABLE_PCLK_MIF_SECURE_RTC */
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GATE(CLK_PCLK_RTC, "pclk_rtc", "div_aclk_mif_133",
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GATE(CLK_PCLK_RTC, "pclk_rtc", "div_aclk_mif_133",
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