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drm/nvc0: implement crtc pll setting
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
0165d15dba
commit
1ac7b528a0
2 changed files with 21 additions and 4 deletions
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@ -4828,7 +4828,7 @@ int get_pll_limits(struct drm_device *dev, uint32_t limit_match, struct pll_lims
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pll_lim->min_p = record[12];
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pll_lim->max_p = record[13];
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/* where did this go to?? */
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if (limit_match == 0x00614100 || limit_match == 0x00614900)
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if ((entry[0] & 0xf0) == 0x80)
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pll_lim->refclk = 27000;
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else
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pll_lim->refclk = 100000;
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@ -264,11 +264,16 @@ nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, int scaling_mode, bool update)
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int
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nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)
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{
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uint32_t reg = NV50_PDISPLAY_CRTC_CLK_CTRL1(head);
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct pll_lims pll;
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uint32_t reg1, reg2;
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uint32_t reg, reg1, reg2;
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int ret, N1, M1, N2, M2, P;
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if (dev_priv->chipset < NV_C0)
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reg = NV50_PDISPLAY_CRTC_CLK_CTRL1(head);
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else
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reg = 0x614140 + (head * 0x800);
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ret = get_pll_limits(dev, reg, &pll);
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if (ret)
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return ret;
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@ -286,7 +291,8 @@ nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)
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nv_wr32(dev, reg, 0x10000611);
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nv_wr32(dev, reg + 4, reg1 | (M1 << 16) | N1);
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nv_wr32(dev, reg + 8, reg2 | (P << 28) | (M2 << 16) | N2);
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} else {
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} else
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if (dev_priv->chipset < NV_C0) {
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ret = nv50_calc_pll2(dev, &pll, pclk, &N1, &N2, &M1, &P);
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if (ret <= 0)
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return 0;
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@ -298,6 +304,17 @@ nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)
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nv_wr32(dev, reg, 0x50000610);
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nv_wr32(dev, reg + 4, reg1 | (P << 16) | (M1 << 8) | N1);
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nv_wr32(dev, reg + 8, N2);
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} else {
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ret = nv50_calc_pll2(dev, &pll, pclk, &N1, &N2, &M1, &P);
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if (ret <= 0)
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return 0;
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NV_DEBUG(dev, "pclk %d out %d N %d fN 0x%04x M %d P %d\n",
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pclk, ret, N1, N2, M1, P);
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nv_mask(dev, reg + 0x0c, 0x00000000, 0x00000100);
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nv_wr32(dev, reg + 0x04, (P << 16) | (N1 << 8) | M1);
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nv_wr32(dev, reg + 0x10, N2 << 16);
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}
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return 0;
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