mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-09-19 17:11:03 +00:00
Code Issues Releases Wiki Activity

net: phy: meson-gxl: check phy_write return value

Browse source 
[ Upstream commit 9042b46eda ]

Always check phy_write return values. Better to be safe than sorry

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jerome Brunet 2017-12-18 10:44:40 +01:00 committed by Greg Kroah-Hartman
parent ea60e54b22
commit 1b485793ce
1 changed files with 38 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

50
drivers/net/phy/meson-gxl.c
View file

@ -25,27 +25,53 @@
static int meson_gxl_config_init(struct phy_device *phydev)
{
int ret;
/* Enable Analog and DSP register Bank access by */
phy_write(phydev, 0x14, 0x0000);
phy_write(phydev, 0x14, 0x0400);
phy_write(phydev, 0x14, 0x0000);
phy_write(phydev, 0x14, 0x0400);
ret = phy_write(phydev, 0x14, 0x0000);
if (ret)
return ret;
ret = phy_write(phydev, 0x14, 0x0400);
if (ret)
return ret;
ret = phy_write(phydev, 0x14, 0x0000);
if (ret)
return ret;
ret = phy_write(phydev, 0x14, 0x0400);
if (ret)
return ret;
/* Write Analog register 23 */
phy_write(phydev, 0x17, 0x8E0D);
phy_write(phydev, 0x14, 0x4417);
ret = phy_write(phydev, 0x17, 0x8E0D);
if (ret)
return ret;
ret = phy_write(phydev, 0x14, 0x4417);
if (ret)
return ret;
/* Enable fractional PLL */
phy_write(phydev, 0x17, 0x0005);
phy_write(phydev, 0x14, 0x5C1B);
ret = phy_write(phydev, 0x17, 0x0005);
if (ret)
return ret;
ret = phy_write(phydev, 0x14, 0x5C1B);
if (ret)
return ret;
/* Program fraction FR_PLL_DIV1 */
phy_write(phydev, 0x17, 0x029A);
phy_write(phydev, 0x14, 0x5C1D);
ret = phy_write(phydev, 0x17, 0x029A);
if (ret)
return ret;
ret = phy_write(phydev, 0x14, 0x5C1D);
if (ret)
return ret;
/* Program fraction FR_PLL_DIV1 */
phy_write(phydev, 0x17, 0xAAAA);
phy_write(phydev, 0x14, 0x5C1C);
ret = phy_write(phydev, 0x17, 0xAAAA);
if (ret)
return ret;
ret = phy_write(phydev, 0x14, 0x5C1C);
if (ret)
return ret;
return 0;
}