alpha: fixes for specific machine types
Files: arch/alpha/kernel/core_mcpcia.c arch/alpha/kernel/sys_rawhide.c include/asm-alpha/core_mcpcia.h Determine correct hose configuration; RAWHIDE family can have 2 or 4 hoses, so make sure non-existent hoses are ignored. arch/alpha/kernel/err_titan.c Supply a needed #include <asm/irq_regs.h> arch/alpha/kernel/module.c Add some useful output to the relocation overflow messages. arch/alpha/kernel/sys_noritake.c Supply necessary noritake_end_irq() to correct interrupt handling. This fixes a problem first noted by hangs during boot probing with a DE500-BA TULIP NIC present. arch/alpha/kernel/sys_sio.c Correct saving of original PIRQ register (PCI IRQ routing); change default PIRQ setting to leave PCI IRQs 9 and 14 free to be used for sound (Multia) and IDE (any), respectively. include/asm-alpha/io.h Supply the "isa_virt_to_bus" routine. Signed-off-by: Jay Estabrook <jay.estabrook@hp.com> Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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8a93258ce3
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1b75b05b73
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@ -40,8 +40,6 @@
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# define DBG_CFG(args)
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# define DBG_CFG(args)
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#endif
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#endif
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#define MCPCIA_MAX_HOSES 4
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/*
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/*
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* Given a bus, device, and function number, compute resulting
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* Given a bus, device, and function number, compute resulting
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* configuration space address and setup the MCPCIA_HAXR2 register
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* configuration space address and setup the MCPCIA_HAXR2 register
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@ -16,6 +16,7 @@
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#include <asm/smp.h>
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#include <asm/smp.h>
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#include <asm/err_common.h>
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#include <asm/err_common.h>
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#include <asm/err_ev6.h>
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#include <asm/err_ev6.h>
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#include <asm/irq_regs.h>
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#include "err_impl.h"
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#include "err_impl.h"
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#include "proto.h"
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#include "proto.h"
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@ -285,12 +285,12 @@ apply_relocate_add(Elf64_Shdr *sechdrs, const char *strtab,
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reloc_overflow:
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reloc_overflow:
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if (ELF64_ST_TYPE (sym->st_info) == STT_SECTION)
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if (ELF64_ST_TYPE (sym->st_info) == STT_SECTION)
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printk(KERN_ERR
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printk(KERN_ERR
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"module %s: Relocation overflow vs section %d\n",
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"module %s: Relocation (type %lu) overflow vs section %d\n",
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me->name, sym->st_shndx);
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me->name, r_type, sym->st_shndx);
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else
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else
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printk(KERN_ERR
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printk(KERN_ERR
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"module %s: Relocation overflow vs %s\n",
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"module %s: Relocation (type %lu) overflow vs %s\n",
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me->name, strtab + sym->st_name);
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me->name, r_type, strtab + sym->st_name);
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return -ENOEXEC;
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return -ENOEXEC;
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}
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}
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}
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}
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@ -66,6 +66,13 @@ noritake_startup_irq(unsigned int irq)
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return 0;
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return 0;
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}
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}
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static void
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noritake_end_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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noritake_enable_irq(irq);
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}
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static struct hw_interrupt_type noritake_irq_type = {
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static struct hw_interrupt_type noritake_irq_type = {
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.typename = "NORITAKE",
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.typename = "NORITAKE",
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.startup = noritake_startup_irq,
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.startup = noritake_startup_irq,
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@ -73,7 +80,7 @@ static struct hw_interrupt_type noritake_irq_type = {
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.enable = noritake_enable_irq,
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.enable = noritake_enable_irq,
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.disable = noritake_disable_irq,
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.disable = noritake_disable_irq,
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.ack = noritake_disable_irq,
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.ack = noritake_disable_irq,
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.end = noritake_enable_irq,
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.end = noritake_end_irq,
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};
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};
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static void
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static void
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@ -52,6 +52,9 @@ rawhide_update_irq_hw(int hose, int mask)
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*(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose));
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*(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose));
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}
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}
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#define hose_exists(h) \
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(((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0))
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static inline void
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static inline void
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rawhide_enable_irq(unsigned int irq)
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rawhide_enable_irq(unsigned int irq)
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{
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{
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@ -59,6 +62,9 @@ rawhide_enable_irq(unsigned int irq)
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irq -= 16;
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irq -= 16;
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hose = irq / 24;
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hose = irq / 24;
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if (!hose_exists(hose)) /* if hose non-existent, exit */
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return;
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irq -= hose * 24;
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irq -= hose * 24;
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mask = 1 << irq;
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mask = 1 << irq;
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@ -76,6 +82,9 @@ rawhide_disable_irq(unsigned int irq)
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irq -= 16;
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irq -= 16;
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hose = irq / 24;
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hose = irq / 24;
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if (!hose_exists(hose)) /* if hose non-existent, exit */
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return;
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irq -= hose * 24;
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irq -= hose * 24;
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mask = ~(1 << irq) | hose_irq_masks[hose];
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mask = ~(1 << irq) | hose_irq_masks[hose];
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@ -93,6 +102,9 @@ rawhide_mask_and_ack_irq(unsigned int irq)
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irq -= 16;
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irq -= 16;
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hose = irq / 24;
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hose = irq / 24;
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if (!hose_exists(hose)) /* if hose non-existent, exit */
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return;
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irq -= hose * 24;
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irq -= hose * 24;
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mask1 = 1 << irq;
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mask1 = 1 << irq;
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mask = ~mask1 | hose_irq_masks[hose];
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mask = ~mask1 | hose_irq_masks[hose];
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@ -169,6 +181,9 @@ rawhide_init_irq(void)
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mcpcia_init_hoses();
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mcpcia_init_hoses();
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/* Clear them all; only hoses that exist will be non-zero. */
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for (i = 0; i < MCPCIA_MAX_HOSES; i++) cached_irq_masks[i] = 0;
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for (hose = hose_head; hose; hose = hose->next) {
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for (hose = hose_head; hose; hose = hose->next) {
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unsigned int h = hose->index;
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unsigned int h = hose->index;
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unsigned int mask = hose_irq_masks[h];
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unsigned int mask = hose_irq_masks[h];
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@ -84,12 +84,16 @@ alphabook1_init_arch(void)
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static void __init
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static void __init
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sio_pci_route(void)
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sio_pci_route(void)
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{
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{
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#if defined(ALPHA_RESTORE_SRM_SETUP)
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unsigned int orig_route_tab;
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/* First, read and save the original setting. */
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/* First, ALWAYS read and print the original setting. */
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pci_bus_read_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60,
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pci_bus_read_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60,
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&saved_config.orig_route_tab);
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&orig_route_tab);
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printk("%s: PIRQ original 0x%x new 0x%x\n", __FUNCTION__,
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printk("%s: PIRQ original 0x%x new 0x%x\n", __FUNCTION__,
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saved_config.orig_route_tab, alpha_mv.sys.sio.route_tab);
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orig_route_tab, alpha_mv.sys.sio.route_tab);
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#if defined(ALPHA_RESTORE_SRM_SETUP)
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saved_config.orig_route_tab = orig_route_tab;
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#endif
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#endif
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/* Now override with desired setting. */
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/* Now override with desired setting. */
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@ -334,7 +338,7 @@ struct alpha_machine_vector avanti_mv __initmv = {
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.pci_swizzle = common_swizzle,
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.pci_swizzle = common_swizzle,
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.sys = { .sio = {
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.sys = { .sio = {
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.route_tab = 0x0b0a0e0f,
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.route_tab = 0x0b0a050f, /* leave 14 for IDE, 9 for SND */
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}}
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}}
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};
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};
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ALIAS_MV(avanti)
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ALIAS_MV(avanti)
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@ -72,6 +72,8 @@
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*
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*
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*/
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*/
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#define MCPCIA_MAX_HOSES 4
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#define MCPCIA_MID(m) ((unsigned long)(m) << 33)
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#define MCPCIA_MID(m) ((unsigned long)(m) << 33)
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/* Dodge has PCI0 and PCI1 at MID 4 and 5 respectively.
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/* Dodge has PCI0 and PCI1 at MID 4 and 5 respectively.
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@ -113,6 +113,7 @@ static inline unsigned long virt_to_bus(void *address)
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unsigned long bus = phys + __direct_map_base;
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unsigned long bus = phys + __direct_map_base;
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return phys <= __direct_map_size ? bus : 0;
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return phys <= __direct_map_size ? bus : 0;
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}
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}
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#define isa_virt_to_bus virt_to_bus
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static inline void *bus_to_virt(unsigned long address)
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static inline void *bus_to_virt(unsigned long address)
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{
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{
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