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drm/amdgpu: impl sriov detection for vega10
Read vega10 hw register to detect if sriov is enabled, and call it before IP blocks setting. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3 changed files with 21 additions and 0 deletions
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@ -231,3 +231,21 @@ int nbio_v6_1_init(struct amdgpu_device *adev)
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return 0;
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return 0;
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}
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}
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void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev)
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{
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uint32_t reg;
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reg = RREG32(SOC15_REG_OFFSET(NBIO, 0,
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mmRCC_PF_0_0_RCC_IOV_FUNC_IDENTIFIER));
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if (reg & 1)
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adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;
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if (reg & 0x80000000)
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adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
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if (!reg) {
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if (is_virtual_machine()) /* passthrough mode exclus sriov mod */
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adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE;
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}
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}
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@ -48,5 +48,6 @@ void nbio_v6_1_ih_control(struct amdgpu_device *adev);
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u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev);
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u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev);
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void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable);
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void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable);
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void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable);
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void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable);
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void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev);
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#endif
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#endif
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@ -469,6 +469,8 @@ static const struct amdgpu_ip_block_version vega10_common_ip_block =
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int soc15_set_ip_blocks(struct amdgpu_device *adev)
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int soc15_set_ip_blocks(struct amdgpu_device *adev)
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{
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{
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nbio_v6_1_detect_hw_virt(adev);
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switch (adev->asic_type) {
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switch (adev->asic_type) {
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case CHIP_VEGA10:
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case CHIP_VEGA10:
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amdgpu_ip_block_add(adev, &vega10_common_ip_block);
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amdgpu_ip_block_add(adev, &vega10_common_ip_block);
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