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mfd: intel-lpss: Use devm_ioremap_uc for MMIO
commit a8ff78f7f7
upstream.
Some BIOS erroneously specifies write-combining BAR for intel-lpss-pci
in MTRR. This will cause the system to hang during boot. If possible,
this bug could be corrected with a firmware update.
This patch use devm_ioremap_uc to overwrite/ignore the MTRR settings
by forcing the use of strongly uncachable pages for intel-lpss.
The BIOS bug is present on Dell XPS 13 7390 2-in-1:
[ 0.001734] 5 base 4000000000 mask 6000000000 write-combining
4000000000-7fffffffff : PCI Bus 0000:00
4000000000-400fffffff : 0000:00:02.0 (i915)
4010000000-4010000fff : 0000:00:15.0 (intel-lpss-pci)
Link: https://bugzilla.kernel.org/show_bug.cgi?id=203485
Cc: <stable@vger.kernel.org> # v4.19+
Tested-by: AceLan Kao <acelan.kao@canonical.com>
Signed-off-by: Tuowen Zhao <ztuowen@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Roman Gilg <subdiff@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
78b19f56b9
commit
1bc508b2d1
1 changed files with 1 additions and 1 deletions
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@ -384,7 +384,7 @@ int intel_lpss_probe(struct device *dev,
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if (!lpss)
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if (!lpss)
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return -ENOMEM;
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return -ENOMEM;
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lpss->priv = devm_ioremap(dev, info->mem->start + LPSS_PRIV_OFFSET,
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lpss->priv = devm_ioremap_uc(dev, info->mem->start + LPSS_PRIV_OFFSET,
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LPSS_PRIV_SIZE);
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LPSS_PRIV_SIZE);
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if (!lpss->priv)
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if (!lpss->priv)
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return -ENOMEM;
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return -ENOMEM;
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