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platform/x86: pmc_atom: Check state of PMC managed devices on s2idle
For the Bay Trail or Cherry Trail SoC to enter the S0i3 power-level at s2idle suspend requires most of the hw-blocks / devices in the SoC to be in D3 when entering s2idle suspend. If some devices are not in D3 then the SoC will stay in a higher power state, consuming much more power from the battery then in S0i3. Use the new acpi_s2idle_dev_ops and acpi_register_lps0_dev() functionality to register a new s2idle check function which checks that all hardware blocks in the South complex (controlled by the PMC) are in a state that allows the SoC to enter S0i3 and prints an error message for any device in D0. Some blocks are not used on lower-featured versions of the SoC and these blocks will always report being in D0 on SoCs were they are not used. A false-positive mask is used to identify these blocks and for blocks in this mask the error is turned into a debug message to avoid false-positive error messages. Note the pmc_atom code is enabled by CONFIG_X86_INTEL_LPSS which already depends on ACPI. Signed-off-by: Johannes Stezenbach <js@sig21.net> Signed-off-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> [hdegoede: Use acpi_s2idle_dev_ops, ignore fused off blocks, PMIC I2C] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20240305105915.76242-4-hdegoede@redhat.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
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1 changed files with 68 additions and 0 deletions
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@ -6,6 +6,7 @@
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/acpi.h>
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#include <linux/debugfs.h>
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#include <linux/device.h>
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#include <linux/dmi.h>
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@ -17,6 +18,7 @@
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/seq_file.h>
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#include <linux/suspend.h>
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struct pmc_bit_map {
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const char *name;
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@ -448,6 +450,71 @@ static int pmc_setup_clks(struct pci_dev *pdev, void __iomem *pmc_regmap,
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return 0;
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}
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#ifdef CONFIG_SUSPEND
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static void pmc_dev_state_check(u32 sts, const struct pmc_bit_map *sts_map,
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u32 fd, const struct pmc_bit_map *fd_map,
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u32 sts_possible_false_pos)
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{
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int index;
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for (index = 0; sts_map[index].name; index++) {
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if (!(fd_map[index].bit_mask & fd) &&
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!(sts_map[index].bit_mask & sts)) {
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if (sts_map[index].bit_mask & sts_possible_false_pos)
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pm_pr_dbg("%s is in D0 prior to s2idle\n",
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sts_map[index].name);
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else
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pr_err("%s is in D0 prior to s2idle\n",
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sts_map[index].name);
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}
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}
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}
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static void pmc_s2idle_check(void)
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{
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struct pmc_dev *pmc = &pmc_device;
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const struct pmc_reg_map *m = pmc->map;
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u32 func_dis, func_dis_2;
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u32 d3_sts_0, d3_sts_1;
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u32 false_pos_sts_0, false_pos_sts_1;
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func_dis = pmc_reg_read(pmc, PMC_FUNC_DIS);
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func_dis_2 = pmc_reg_read(pmc, PMC_FUNC_DIS_2);
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d3_sts_0 = pmc_reg_read(pmc, PMC_D3_STS_0);
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d3_sts_1 = pmc_reg_read(pmc, PMC_D3_STS_1);
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/*
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* Some blocks are not used on lower-featured versions of the SoC and
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* always report D0, add these to false_pos mask to log at debug level.
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*/
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if (m->d3_sts_1 == byt_d3_sts_1_map) {
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/* Bay Trail */
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false_pos_sts_0 = BIT_GBE | BIT_SATA | BIT_PCIE_PORT0 |
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BIT_PCIE_PORT1 | BIT_PCIE_PORT2 | BIT_PCIE_PORT3 |
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BIT_LPSS2_F5_I2C5;
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false_pos_sts_1 = BIT_SMB | BIT_USH_SS_PHY | BIT_DFX;
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} else {
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/* Cherry Trail */
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false_pos_sts_0 = BIT_GBE | BIT_SATA | BIT_LPSS2_F7_I2C7;
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false_pos_sts_1 = BIT_SMB | BIT_STS_ISH;
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}
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pmc_dev_state_check(d3_sts_0, m->d3_sts_0, func_dis, m->func_dis, false_pos_sts_0);
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pmc_dev_state_check(d3_sts_1, m->d3_sts_1, func_dis_2, m->func_dis_2, false_pos_sts_1);
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}
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static struct acpi_s2idle_dev_ops pmc_s2idle_ops = {
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.check = pmc_s2idle_check,
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};
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static void pmc_s2idle_check_register(void)
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{
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acpi_register_lps0_dev(&pmc_s2idle_ops);
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}
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#else
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static void pmc_s2idle_check_register(void) {}
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#endif
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static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct pmc_dev *pmc = &pmc_device;
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@ -485,6 +552,7 @@ static int pmc_setup_dev(struct pci_dev *pdev, const struct pci_device_id *ent)
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dev_warn(&pdev->dev, "platform clocks register failed: %d\n",
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ret);
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pmc_s2idle_check_register();
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pmc->init = true;
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return ret;
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}
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