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synced 2024-08-21 08:19:28 +00:00
dmaengine: qcom_hidma: add MSI support for interrupts
The interrupts can now be delivered as platform MSI interrupts on newer platforms. The code looks for a new OF and ACPI strings in order to enable the functionality. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
parent
0e858f8d6f
commit
1c0e3e82a7
3 changed files with 147 additions and 6 deletions
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@ -56,6 +56,7 @@
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#include <linux/irq.h>
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#include <linux/atomic.h>
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#include <linux/pm_runtime.h>
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#include <linux/msi.h>
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#include "../dmaengine.h"
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#include "hidma.h"
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@ -70,6 +71,7 @@
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#define HIDMA_ERR_INFO_SW 0xFF
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#define HIDMA_ERR_CODE_UNEXPECTED_TERMINATE 0x0
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#define HIDMA_NR_DEFAULT_DESC 10
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#define HIDMA_MSI_INTS 11
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static inline struct hidma_dev *to_hidma_dev(struct dma_device *dmadev)
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{
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@ -553,6 +555,15 @@ static irqreturn_t hidma_chirq_handler(int chirq, void *arg)
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return hidma_ll_inthandler(chirq, lldev);
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}
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static irqreturn_t hidma_chirq_handler_msi(int chirq, void *arg)
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{
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struct hidma_lldev **lldevp = arg;
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struct hidma_dev *dmadev = to_hidma_dev_from_lldev(lldevp);
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return hidma_ll_inthandler_msi(chirq, *lldevp,
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1 << (chirq - dmadev->msi_virqbase));
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}
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static ssize_t hidma_show_values(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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@ -590,6 +601,104 @@ static int hidma_create_sysfs_entry(struct hidma_dev *dev, char *name,
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return device_create_file(dev->ddev.dev, attrs);
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}
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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static void hidma_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
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{
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struct device *dev = msi_desc_to_dev(desc);
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struct hidma_dev *dmadev = dev_get_drvdata(dev);
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if (!desc->platform.msi_index) {
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writel(msg->address_lo, dmadev->dev_evca + 0x118);
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writel(msg->address_hi, dmadev->dev_evca + 0x11C);
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writel(msg->data, dmadev->dev_evca + 0x120);
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}
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}
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#endif
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static void hidma_free_msis(struct hidma_dev *dmadev)
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{
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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struct device *dev = dmadev->ddev.dev;
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struct msi_desc *desc;
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/* free allocated MSI interrupts above */
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for_each_msi_entry(desc, dev)
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devm_free_irq(dev, desc->irq, &dmadev->lldev);
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platform_msi_domain_free_irqs(dev);
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#endif
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}
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static int hidma_request_msi(struct hidma_dev *dmadev,
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struct platform_device *pdev)
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{
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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int rc;
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struct msi_desc *desc;
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struct msi_desc *failed_desc = NULL;
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rc = platform_msi_domain_alloc_irqs(&pdev->dev, HIDMA_MSI_INTS,
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hidma_write_msi_msg);
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if (rc)
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return rc;
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for_each_msi_entry(desc, &pdev->dev) {
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if (!desc->platform.msi_index)
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dmadev->msi_virqbase = desc->irq;
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rc = devm_request_irq(&pdev->dev, desc->irq,
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hidma_chirq_handler_msi,
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0, "qcom-hidma-msi",
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&dmadev->lldev);
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if (rc) {
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failed_desc = desc;
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break;
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}
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}
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if (rc) {
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/* free allocated MSI interrupts above */
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for_each_msi_entry(desc, &pdev->dev) {
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if (desc == failed_desc)
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break;
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devm_free_irq(&pdev->dev, desc->irq,
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&dmadev->lldev);
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}
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} else {
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/* Add callback to free MSIs on teardown */
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hidma_ll_setup_irq(dmadev->lldev, true);
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}
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if (rc)
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dev_warn(&pdev->dev,
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"failed to request MSI irq, falling back to wired IRQ\n");
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return rc;
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#else
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return -EINVAL;
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#endif
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}
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static bool hidma_msi_capable(struct device *dev)
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{
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struct acpi_device *adev = ACPI_COMPANION(dev);
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const char *of_compat;
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int ret = -EINVAL;
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if (!adev || acpi_disabled) {
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ret = device_property_read_string(dev, "compatible",
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&of_compat);
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if (ret)
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return false;
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ret = strcmp(of_compat, "qcom,hidma-1.1");
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} else {
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#ifdef CONFIG_ACPI
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ret = strcmp(acpi_device_hid(adev), "QCOM8062");
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#endif
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}
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return ret == 0;
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}
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static int hidma_probe(struct platform_device *pdev)
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{
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struct hidma_dev *dmadev;
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@ -599,6 +708,7 @@ static int hidma_probe(struct platform_device *pdev)
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void __iomem *evca;
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void __iomem *trca;
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int rc;
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bool msi;
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pm_runtime_set_autosuspend_delay(&pdev->dev, HIDMA_AUTOSUSPEND_TIMEOUT);
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pm_runtime_use_autosuspend(&pdev->dev);
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@ -660,6 +770,12 @@ static int hidma_probe(struct platform_device *pdev)
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dmadev->ddev.device_terminate_all = hidma_terminate_all;
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dmadev->ddev.copy_align = 8;
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/*
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* Determine the MSI capability of the platform. Old HW doesn't
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* support MSI.
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*/
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msi = hidma_msi_capable(&pdev->dev);
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device_property_read_u32(&pdev->dev, "desc-count",
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&dmadev->nr_descriptors);
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@ -688,10 +804,17 @@ static int hidma_probe(struct platform_device *pdev)
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goto dmafree;
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}
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rc = devm_request_irq(&pdev->dev, chirq, hidma_chirq_handler, 0,
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"qcom-hidma", dmadev->lldev);
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if (rc)
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goto uninit;
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platform_set_drvdata(pdev, dmadev);
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if (msi)
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rc = hidma_request_msi(dmadev, pdev);
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if (!msi || rc) {
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hidma_ll_setup_irq(dmadev->lldev, false);
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rc = devm_request_irq(&pdev->dev, chirq, hidma_chirq_handler,
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0, "qcom-hidma", dmadev->lldev);
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if (rc)
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goto uninit;
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}
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INIT_LIST_HEAD(&dmadev->ddev.channels);
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rc = hidma_chan_init(dmadev, 0);
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@ -707,12 +830,14 @@ static int hidma_probe(struct platform_device *pdev)
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hidma_debug_init(dmadev);
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hidma_create_sysfs_entry(dmadev, "chid", S_IRUGO);
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dev_info(&pdev->dev, "HI-DMA engine driver registration complete\n");
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platform_set_drvdata(pdev, dmadev);
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pm_runtime_mark_last_busy(dmadev->ddev.dev);
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pm_runtime_put_autosuspend(dmadev->ddev.dev);
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return 0;
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uninit:
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if (msi)
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hidma_free_msis(dmadev);
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hidma_debug_uninit(dmadev);
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hidma_ll_uninit(dmadev->lldev);
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dmafree:
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@ -730,7 +855,11 @@ static int hidma_remove(struct platform_device *pdev)
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pm_runtime_get_sync(dmadev->ddev.dev);
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dma_async_device_unregister(&dmadev->ddev);
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devm_free_irq(dmadev->ddev.dev, dmadev->irq, dmadev->lldev);
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if (!dmadev->lldev->msi_support)
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devm_free_irq(dmadev->ddev.dev, dmadev->irq, dmadev->lldev);
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else
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hidma_free_msis(dmadev);
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tasklet_kill(&dmadev->task);
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hidma_debug_uninit(dmadev);
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hidma_ll_uninit(dmadev->lldev);
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@ -746,12 +875,14 @@ static int hidma_remove(struct platform_device *pdev)
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#if IS_ENABLED(CONFIG_ACPI)
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static const struct acpi_device_id hidma_acpi_ids[] = {
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{"QCOM8061"},
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{"QCOM8062"},
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{},
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};
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#endif
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static const struct of_device_id hidma_match[] = {
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{.compatible = "qcom,hidma-1.0",},
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{.compatible = "qcom,hidma-1.1",},
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{},
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};
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MODULE_DEVICE_TABLE(of, hidma_match);
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@ -115,6 +115,7 @@ struct hidma_dev {
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int irq;
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int chidx;
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u32 nr_descriptors;
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int msi_virqbase;
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struct hidma_lldev *lldev;
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void __iomem *dev_trca;
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u8 chidx);
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int hidma_ll_uninit(struct hidma_lldev *llhndl);
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irqreturn_t hidma_ll_inthandler(int irq, void *arg);
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irqreturn_t hidma_ll_inthandler_msi(int irq, void *arg, int cause);
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void hidma_cleanup_pending_tre(struct hidma_lldev *llhndl, u8 err_info,
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u8 err_code);
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int hidma_debug_init(struct hidma_dev *dmadev);
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@ -457,6 +457,14 @@ irqreturn_t hidma_ll_inthandler(int chirq, void *arg)
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return IRQ_HANDLED;
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}
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irqreturn_t hidma_ll_inthandler_msi(int chirq, void *arg, int cause)
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{
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struct hidma_lldev *lldev = arg;
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hidma_ll_int_handler_internal(lldev, cause);
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return IRQ_HANDLED;
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}
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int hidma_ll_enable(struct hidma_lldev *lldev)
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{
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u32 val;
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