sound updates for 6.4-rc1
At this time, it's an interesting mixture of changes for both old and
new stuff. Majority of changes are about ASoC (lots of systematic
changes for converting remove callbacks to void, and cleanups), while
we got the fixes and the enhancements of very old PCI cards, too.
Here are some highlights:
ALSA/ASoC Core:
- Continued effort of more ASoC core cleanups
- Minor improvements for XRUN handling in indirect PCM helpers
- Code refactoring of PCM core code
ASoC:
- Continued feature and simplification work on SOF, including addition
of a no-DSP mode for bringup, HDA MLink and extensions to the IPC4
protocol
- Hibernation support for CS35L45
- More DT binding conversions
- Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363,
nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas R-Car
Gen4, Rockchip RK3588 and TI TAS5733
ALSA:
- Lots of works for legacy emu10k1 and ymfpci PCI drivers
- PCM kselftest fixes and enhancements
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Merge tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"At this time, it's an interesting mixture of changes for both old and
new stuff. Majority of changes are about ASoC (lots of systematic
changes for converting remove callbacks to void, and cleanups), while
we got the fixes and the enhancements of very old PCI cards, too.
Here are some highlights:
ALSA/ASoC Core:
- Continued effort of more ASoC core cleanups
- Minor improvements for XRUN handling in indirect PCM helpers
- Code refactoring of PCM core code
ASoC:
- Continued feature and simplification work on SOF, including
addition of a no-DSP mode for bringup, HDA MLink and extensions to
the IPC4 protocol
- Hibernation support for CS35L45
- More DT binding conversions
- Support for Cirrus Logic CS35L56, Freescale QMC, Maxim MAX98363,
nVidia systems with MAX9809x and RT5631, Realtek RT712, Renesas
R-Car Gen4, Rockchip RK3588 and TI TAS5733
ALSA:
- Lots of works for legacy emu10k1 and ymfpci PCI drivers
- PCM kselftest fixes and enhancements"
* tag 'sound-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (586 commits)
ALSA: emu10k1: use high-level I/O in set_filterQ()
ALSA: emu10k1: use high-level I/O functions also during init
ALSA: emu10k1: fix error handling in snd_audigy_i2c_volume_put()
ALSA: emu10k1: don't stop DSP in _snd_emu10k1_{,audigy_}init_efx()
ALSA: emu10k1: fix SNDRV_EMU10K1_IOCTL_SINGLE_STEP
ALSA: emu10k1: skip Sound Blaster-specific hacks for E-MU cards
ALSA: emu10k1: fixup DSP defines
ALSA: emu10k1: pull in some register definitions from kX-project
ALSA: emu10k1: remove some bogus defines
ALSA: emu10k1: eliminate some unused defines
ALSA: emu10k1: fix lineup of EMU_HANA_* defines
ALSA: emu10k1: comment updates
ALSA: emu10k1: fix snd_emu1010_fpga_read() input masking for rev2 cards
ALSA: emu10k1: remove unused emu->pcm_playback_efx_substream field
ALSA: emu10k1: remove unused `resume` parameter from snd_emu10k1_init()
ALSA: emu10k1: minor optimizations
ALSA: emu10k1: remove remaining cruft from snd_emu10k1_emu1010_init()
ALSA: emu10k1: remove apparently pointless EMU_HANA_OPTION_CARDS reads
ALSA: emu10k1: remove apparently pointless FPGA reads
ALSA: emu10k1: stop doing weird things with HCFG in snd_emu10k1_emu1010_init()
...
This commit is contained in:
Linus Torvalds
commit
1c15ca4e4e
|
|
@ -0,0 +1,162 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: PowerQUICC CPM QUICC Multichannel Controller (QMC)
|
||||
|
||||
maintainers:
|
||||
- Herve Codina <herve.codina@bootlin.com>
|
||||
|
||||
description:
|
||||
The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one
|
||||
serial controller using the same TDM physical interface routed from TSA.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- fsl,mpc885-scc-qmc
|
||||
- fsl,mpc866-scc-qmc
|
||||
- const: fsl,cpm1-scc-qmc
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: SCC (Serial communication controller) register base
|
||||
- description: SCC parameter ram base
|
||||
- description: Dual port ram base
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: scc_regs
|
||||
- const: scc_pram
|
||||
- const: dpram
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: SCC interrupt line in the CPM interrupt controller
|
||||
|
||||
fsl,tsa-serial:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
- items:
|
||||
- description: phandle to TSA node
|
||||
- enum: [1, 2, 3]
|
||||
description: |
|
||||
TSA serial interface (dt-bindings/soc/cpm1-fsl,tsa.h defines these
|
||||
values)
|
||||
- 1: SCC2
|
||||
- 2: SCC3
|
||||
- 3: SCC4
|
||||
description:
|
||||
Should be a phandle/number pair. The phandle to TSA node and the TSA
|
||||
serial interface to use.
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
'^channel@([0-9]|[1-5][0-9]|6[0-3])$':
|
||||
description:
|
||||
A channel managed by this controller
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
minimum: 0
|
||||
maximum: 63
|
||||
description:
|
||||
The channel number
|
||||
|
||||
fsl,operational-mode:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum: [transparent, hdlc]
|
||||
default: transparent
|
||||
description: |
|
||||
The channel operational mode
|
||||
- hdlc: The channel handles HDLC frames
|
||||
- transparent: The channel handles raw data without any processing
|
||||
|
||||
fsl,reverse-data:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
The bit order as seen on the channels is reversed,
|
||||
transmitting/receiving the MSB of each octet first.
|
||||
This flag is used only in 'transparent' mode.
|
||||
|
||||
fsl,tx-ts-mask:
|
||||
$ref: /schemas/types.yaml#/definitions/uint64
|
||||
description:
|
||||
Channel assigned Tx time-slots within the Tx time-slots routed by the
|
||||
TSA to this cell.
|
||||
|
||||
fsl,rx-ts-mask:
|
||||
$ref: /schemas/types.yaml#/definitions/uint64
|
||||
description:
|
||||
Channel assigned Rx time-slots within the Rx time-slots routed by the
|
||||
TSA to this cell.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- fsl,tx-ts-mask
|
||||
- fsl,rx-ts-mask
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts
|
||||
- fsl,tsa-serial
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/soc/cpm1-fsl,tsa.h>
|
||||
|
||||
qmc@a60 {
|
||||
compatible = "fsl,mpc885-scc-qmc", "fsl,cpm1-scc-qmc";
|
||||
reg = <0xa60 0x20>,
|
||||
<0x3f00 0xc0>,
|
||||
<0x2000 0x1000>;
|
||||
reg-names = "scc_regs", "scc_pram", "dpram";
|
||||
interrupts = <27>;
|
||||
interrupt-parent = <&CPM_PIC>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
fsl,tsa-serial = <&tsa FSL_CPM_TSA_SCC4>;
|
||||
|
||||
channel@16 {
|
||||
/* Ch16 : First 4 even TS from all routed from TSA */
|
||||
reg = <16>;
|
||||
fsl,mode = "transparent";
|
||||
fsl,reverse-data;
|
||||
fsl,tx-ts-mask = <0x00000000 0x000000aa>;
|
||||
fsl,rx-ts-mask = <0x00000000 0x000000aa>;
|
||||
};
|
||||
|
||||
channel@17 {
|
||||
/* Ch17 : First 4 odd TS from all routed from TSA */
|
||||
reg = <17>;
|
||||
fsl,mode = "transparent";
|
||||
fsl,reverse-data;
|
||||
fsl,tx-ts-mask = <0x00000000 0x00000055>;
|
||||
fsl,rx-ts-mask = <0x00000000 0x00000055>;
|
||||
};
|
||||
|
||||
channel@19 {
|
||||
/* Ch19 : 8 TS (TS 8..15) from all routed from TSA */
|
||||
reg = <19>;
|
||||
fsl,mode = "hdlc";
|
||||
fsl,tx-ts-mask = <0x00000000 0x0000ff00>;
|
||||
fsl,rx-ts-mask = <0x00000000 0x0000ff00>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,205 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: PowerQUICC CPM Time-slot assigner (TSA) controller
|
||||
|
||||
maintainers:
|
||||
- Herve Codina <herve.codina@bootlin.com>
|
||||
|
||||
description:
|
||||
The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
|
||||
Its purpose is to route some TDM time-slots to other internal serial
|
||||
controllers.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- fsl,mpc885-tsa
|
||||
- fsl,mpc866-tsa
|
||||
- const: fsl,cpm1-tsa
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: SI (Serial Interface) register base
|
||||
- description: SI RAM base
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: si_regs
|
||||
- const: si_ram
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
'^tdm@[0-1]$':
|
||||
description:
|
||||
The TDM managed by this controller
|
||||
type: object
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
reg:
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
description:
|
||||
The TDM number for this TDM, 0 for TDMa and 1 for TDMb
|
||||
|
||||
fsl,common-rxtx-pins:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
The hardware can use four dedicated pins for Tx clock, Tx sync, Rx
|
||||
clock and Rx sync or use only two pins, Tx/Rx clock and Tx/Rx sync.
|
||||
Without the 'fsl,common-rxtx-pins' property, the four pins are used.
|
||||
With the 'fsl,common-rxtx-pins' property, two pins are used.
|
||||
|
||||
clocks:
|
||||
minItems: 2
|
||||
items:
|
||||
- description: External clock connected to L1RSYNC pin
|
||||
- description: External clock connected to L1RCLK pin
|
||||
- description: External clock connected to L1TSYNC pin
|
||||
- description: External clock connected to L1TCLK pin
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
items:
|
||||
- const: l1rsync
|
||||
- const: l1rclk
|
||||
- const: l1tsync
|
||||
- const: l1tclk
|
||||
|
||||
fsl,rx-frame-sync-delay-bits:
|
||||
enum: [0, 1, 2, 3]
|
||||
default: 0
|
||||
description: |
|
||||
Receive frame sync delay in number of bits.
|
||||
Indicates the delay between the Rx sync and the first bit of the Rx
|
||||
frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
|
||||
|
||||
fsl,tx-frame-sync-delay-bits:
|
||||
enum: [0, 1, 2, 3]
|
||||
default: 0
|
||||
description: |
|
||||
Transmit frame sync delay in number of bits.
|
||||
Indicates the delay between the Tx sync and the first bit of the Tx
|
||||
frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
|
||||
|
||||
fsl,clock-falling-edge:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Data is sent on falling edge of the clock (and received on the rising
|
||||
edge). If 'clock-falling-edge' is not present, data is sent on the
|
||||
rising edge (and received on the falling edge).
|
||||
|
||||
fsl,fsync-rising-edge:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Frame sync pulses are sampled with the rising edge of the channel
|
||||
clock. If 'fsync-rising-edge' is not present, pulses are sampled with
|
||||
the falling edge.
|
||||
|
||||
fsl,double-speed-clock:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
The channel clock is twice the data rate.
|
||||
|
||||
patternProperties:
|
||||
'^fsl,[rt]x-ts-routes$':
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-matrix
|
||||
description: |
|
||||
A list of tuple that indicates the Tx or Rx time-slots routes.
|
||||
items:
|
||||
items:
|
||||
- description:
|
||||
The number of time-slots
|
||||
minimum: 1
|
||||
maximum: 64
|
||||
- description: |
|
||||
The source (Tx) or destination (Rx) serial interface
|
||||
(dt-bindings/soc/cpm1-fsl,tsa.h defines these values)
|
||||
- 0: No destination
|
||||
- 1: SCC2
|
||||
- 2: SCC3
|
||||
- 3: SCC4
|
||||
- 4: SMC1
|
||||
- 5: SMC2
|
||||
enum: [0, 1, 2, 3, 4, 5]
|
||||
minItems: 1
|
||||
maxItems: 64
|
||||
|
||||
allOf:
|
||||
# If fsl,common-rxtx-pins is present, only 2 clocks are needed.
|
||||
# Else, the 4 clocks must be present.
|
||||
- if:
|
||||
required:
|
||||
- fsl,common-rxtx-pins
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
maxItems: 2
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 4
|
||||
clock-names:
|
||||
minItems: 4
|
||||
|
||||
required:
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/soc/cpm1-fsl,tsa.h>
|
||||
|
||||
tsa@ae0 {
|
||||
compatible = "fsl,mpc885-tsa", "fsl,cpm1-tsa";
|
||||
reg = <0xae0 0x10>,
|
||||
<0xc00 0x200>;
|
||||
reg-names = "si_regs", "si_ram";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
tdm@0 {
|
||||
/* TDMa */
|
||||
reg = <0>;
|
||||
|
||||
clocks = <&clk_l1rsynca>, <&clk_l1rclka>;
|
||||
clock-names = "l1rsync", "l1rclk";
|
||||
|
||||
fsl,common-rxtx-pins;
|
||||
fsl,fsync-rising-edge;
|
||||
|
||||
fsl,tx-ts-routes = <2 0>, /* TS 0..1 */
|
||||
<24 FSL_CPM_TSA_SCC4>, /* TS 2..25 */
|
||||
<1 0>, /* TS 26 */
|
||||
<5 FSL_CPM_TSA_SCC3>; /* TS 27..31 */
|
||||
|
||||
fsl,rx-ts-routes = <2 0>, /* TS 0..1 */
|
||||
<24 FSL_CPM_TSA_SCC4>, /* 2..25 */
|
||||
<1 0>, /* TS 26 */
|
||||
<5 FSL_CPM_TSA_SCC3>; /* TS 27..31 */
|
||||
};
|
||||
};
|
||||
|
|
@ -32,7 +32,7 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
const: "mclk"
|
||||
const: mclk
|
||||
|
||||
powerdown-gpios:
|
||||
description: GPIO used for hardware power-down.
|
||||
|
|
|
|||
|
|
@ -1,32 +0,0 @@
|
|||
Analog Devices ADAU1361/ADAU1461/ADAU1761/ADAU1961/ADAU1381/ADAU1781
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Should contain one of the following:
|
||||
"adi,adau1361"
|
||||
"adi,adau1461"
|
||||
"adi,adau1761"
|
||||
"adi,adau1961"
|
||||
"adi,adau1381"
|
||||
"adi,adau1781"
|
||||
|
||||
- reg: The i2c address. Value depends on the state of ADDR0
|
||||
and ADDR1, as wired in hardware.
|
||||
|
||||
Optional properties:
|
||||
- clock-names: If provided must be "mclk".
|
||||
- clocks: phandle + clock-specifiers for the clock that provides
|
||||
the audio master clock for the device.
|
||||
|
||||
Examples:
|
||||
#include <dt-bindings/sound/adau17x1.h>
|
||||
|
||||
i2c_bus {
|
||||
adau1361@38 {
|
||||
compatible = "adi,adau1761";
|
||||
reg = <0x38>;
|
||||
|
||||
clock-names = "mclk";
|
||||
clocks = <&audio_clock>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/adi,adau17x1.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices ADAU1361/ADAU1461/ADAU1761/ADAU1961/ADAU1381/ADAU1781 Codec
|
||||
|
||||
maintainers:
|
||||
- Lars-Peter Clausen <lars@metafoo.de>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,adau1361
|
||||
- adi,adau1381
|
||||
- adi,adau1461
|
||||
- adi,adau1761
|
||||
- adi,adau1781
|
||||
- adi,adau1961
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description:
|
||||
The i2c address. Value depends on the state of ADDR0 and ADDR1,
|
||||
as wired in hardware.
|
||||
|
||||
clock-names:
|
||||
const: mclk
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: provides the audio master clock for the device.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
audio-codec@38 {
|
||||
compatible = "adi,adau1761";
|
||||
reg = <0x38>;
|
||||
clock-names = "mclk";
|
||||
clocks = <&audio_clock>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/adi,max98363.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices MAX98363 SoundWire Amplifier
|
||||
|
||||
maintainers:
|
||||
- Ryan Lee <ryans.lee@analog.com>
|
||||
|
||||
description:
|
||||
The MAX98363 is a SoundWire input Class D mono amplifier that
|
||||
supports MIPI SoundWire v1.2-compatible digital interface for
|
||||
audio and control data.
|
||||
SoundWire peripheral device ID of MAX98363 is 0x3*019f836300
|
||||
where * is the peripheral device unique ID decoded from pin.
|
||||
It supports up to 10 peripheral devices(0x0 to 0x9).
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sdw3019f836300
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#sound-dai-cells"
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
soundwire-controller@3250000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x3250000 0x2000>;
|
||||
|
||||
speaker@0,0 {
|
||||
compatible = "sdw3019f836300";
|
||||
reg = <0 0>;
|
||||
#sound-dai-cells = <0>;
|
||||
sound-name-prefix = "Speaker Left";
|
||||
};
|
||||
|
||||
speaker@0,1 {
|
||||
compatible = "sdw3019f836300";
|
||||
reg = <0 1>;
|
||||
#sound-dai-cells = <0>;
|
||||
sound-name-prefix = "Speaker Right";
|
||||
};
|
||||
};
|
||||
|
|
@ -41,21 +41,21 @@ properties:
|
|||
|
||||
adi,vmon-slot-no:
|
||||
description: slot number of the voltage sense monitor
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
default: 0
|
||||
|
||||
adi,imon-slot-no:
|
||||
description: slot number of the current sense monitor
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
default: 1
|
||||
|
||||
adi,spkfb-slot-no:
|
||||
description: slot number of speaker DSP monitor
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
default: 2
|
||||
|
|
@ -64,7 +64,7 @@ properties:
|
|||
description:
|
||||
Selects the PCM data input channel that is routed to the speaker
|
||||
audio processing bypass path.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 15
|
||||
default: 0
|
||||
|
|
|
|||
|
|
@ -1,28 +0,0 @@
|
|||
AK4458 audio DAC
|
||||
|
||||
This device supports I2C mode.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "asahi-kasei,ak4458" or "asahi-kasei,ak4497"
|
||||
- reg : The I2C address of the device for I2C
|
||||
|
||||
Optional properties:
|
||||
- reset-gpios: A GPIO specifier for the power down & reset pin
|
||||
- mute-gpios: A GPIO specifier for the soft mute pin
|
||||
- AVDD-supply: Analog power supply
|
||||
- DVDD-supply: Digital power supply
|
||||
- dsd-path: Select DSD input pins for ak4497
|
||||
0: select #16, #17, #19 pins
|
||||
1: select #3, #4, #5 pins
|
||||
|
||||
Example:
|
||||
|
||||
&i2c {
|
||||
ak4458: dac@10 {
|
||||
compatible = "asahi-kasei,ak4458";
|
||||
reg = <0x10>;
|
||||
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>
|
||||
mute-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>
|
||||
};
|
||||
};
|
||||
|
|
@ -1,24 +0,0 @@
|
|||
AK5558 8 channel differential 32-bit delta-sigma ADC
|
||||
|
||||
This device supports I2C mode only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "asahi-kasei,ak5558" or "asahi-kasei,ak5552".
|
||||
- reg : The I2C address of the device.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- reset-gpios: A GPIO specifier for the power down & reset pin.
|
||||
- AVDD-supply: Analog power supply
|
||||
- DVDD-supply: Digital power supply
|
||||
|
||||
Example:
|
||||
|
||||
&i2c {
|
||||
ak5558: adc@10 {
|
||||
compatible = "asahi-kasei,ak5558";
|
||||
reg = <0x10>;
|
||||
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,43 +0,0 @@
|
|||
ALC5632 audio CODEC
|
||||
|
||||
This device supports I2C only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "realtek,alc5632"
|
||||
|
||||
- reg : the I2C address of the device.
|
||||
|
||||
- gpio-controller : Indicates this device is a GPIO controller.
|
||||
|
||||
- #gpio-cells : Should be two. The first cell is the pin number and the
|
||||
second cell is used to specify optional parameters (currently unused).
|
||||
|
||||
Pins on the device (for linking into audio routes):
|
||||
|
||||
* SPK_OUTP
|
||||
* SPK_OUTN
|
||||
* HP_OUT_L
|
||||
* HP_OUT_R
|
||||
* AUX_OUT_P
|
||||
* AUX_OUT_N
|
||||
* LINE_IN_L
|
||||
* LINE_IN_R
|
||||
* PHONE_P
|
||||
* PHONE_N
|
||||
* MIC1_P
|
||||
* MIC1_N
|
||||
* MIC2_P
|
||||
* MIC2_N
|
||||
* MICBIAS1
|
||||
* DMICDAT
|
||||
|
||||
Example:
|
||||
|
||||
alc5632: alc5632@1e {
|
||||
compatible = "realtek,alc5632";
|
||||
reg = <0x1a>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/asahi-kasei,ak4458.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: AK4458 audio DAC
|
||||
|
||||
maintainers:
|
||||
- Shengjiu Wang <shengjiu.wang@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- asahi-kasei,ak4458
|
||||
- asahi-kasei,ak4497
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
avdd-supply:
|
||||
description: Analog power supply
|
||||
|
||||
dvdd-supply:
|
||||
description: Digital power supply
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
mute-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
GPIO used to mute all the outputs
|
||||
|
||||
dsd-path:
|
||||
description: Select DSD input pins for ak4497
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
oneOf:
|
||||
- const: 0
|
||||
description: "select #16, #17, #19 pins"
|
||||
- const: 1
|
||||
description: "select #3, #4, #5 pins"
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: asahi-kasei,ak4458
|
||||
|
||||
then:
|
||||
properties:
|
||||
dsd-path: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@10 {
|
||||
compatible = "asahi-kasei,ak4458";
|
||||
reg = <0x10>;
|
||||
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
mute-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/asahi-kasei,ak5558.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: AK5558 8 channel differential 32-bit delta-sigma ADC
|
||||
|
||||
maintainers:
|
||||
- Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>
|
||||
- Mihai Serban <mihai.serban@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- asahi-kasei,ak5552
|
||||
- asahi-kasei,ak5558
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
avdd-supply:
|
||||
description: A 1.8V supply that powers up the AVDD pin.
|
||||
|
||||
dvdd-supply:
|
||||
description: A 1.2V supply that powers up the DVDD pin.
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ak5558: codec@10 {
|
||||
compatible = "asahi-kasei,ak5558";
|
||||
reg = <0x10>;
|
||||
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
|
@ -16,19 +16,19 @@ definitions:
|
|||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
properties:
|
||||
convert-rate:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate
|
||||
convert-channels:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels
|
||||
convert-sample-format:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format
|
||||
mclk-fs:
|
||||
$ref: "simple-card.yaml#/definitions/mclk-fs"
|
||||
$ref: simple-card.yaml#/definitions/mclk-fs
|
||||
|
||||
endpoint-base:
|
||||
$ref: /schemas/graph.yaml#/$defs/endpoint-base
|
||||
properties:
|
||||
mclk-fs:
|
||||
$ref: "simple-card.yaml#/definitions/mclk-fs"
|
||||
$ref: simple-card.yaml#/definitions/mclk-fs
|
||||
frame-inversion:
|
||||
description: dai-link uses frame clock inversion
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
|
|
@ -49,11 +49,11 @@ definitions:
|
|||
description: Indicates system clock
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
system-clock-frequency:
|
||||
$ref: "simple-card.yaml#/definitions/system-clock-frequency"
|
||||
$ref: simple-card.yaml#/definitions/system-clock-frequency
|
||||
system-clock-direction-out:
|
||||
$ref: "simple-card.yaml#/definitions/system-clock-direction-out"
|
||||
$ref: simple-card.yaml#/definitions/system-clock-direction-out
|
||||
system-clock-fixed:
|
||||
$ref: "simple-card.yaml#/definitions/system-clock-fixed"
|
||||
$ref: simple-card.yaml#/definitions/system-clock-fixed
|
||||
|
||||
dai-format:
|
||||
description: audio format.
|
||||
|
|
@ -69,11 +69,11 @@ definitions:
|
|||
- msb
|
||||
- lsb
|
||||
convert-rate:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate
|
||||
convert-channels:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels
|
||||
convert-sample-format:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format
|
||||
|
||||
dai-tdm-slot-num:
|
||||
description: Number of slots in use.
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ properties:
|
|||
label:
|
||||
maxItems: 1
|
||||
prefix:
|
||||
description: "device name prefix"
|
||||
description: device name prefix
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
routing:
|
||||
description: |
|
||||
|
|
@ -27,11 +27,11 @@ properties:
|
|||
description: User specified audio sound widgets.
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
convert-rate:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate
|
||||
convert-channels:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels
|
||||
convert-sample-format:
|
||||
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
|
||||
$ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format
|
||||
|
||||
pa-gpios:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -85,11 +85,19 @@ properties:
|
|||
boost-cap-microfarad.
|
||||
External Boost must have GPIO1 as GPIO output. GPIO1 will be set high to
|
||||
enable boost voltage.
|
||||
Shared boost allows two amplifiers to share a single boost circuit by
|
||||
communicating on the MDSYNC bus. The active amplifier controls the boost
|
||||
circuit using combined data from both amplifiers. GPIO1 should be
|
||||
configured for Sync when shared boost is used. Shared boost is not
|
||||
compatible with External boost. Active amplifier requires
|
||||
boost-peak-milliamp, boost-ind-nanohenry and boost-cap-microfarad.
|
||||
0 = Internal Boost
|
||||
1 = External Boost
|
||||
2 = Shared Boost Active
|
||||
3 = Shared Boost Passive
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
maximum: 3
|
||||
|
||||
cirrus,gpio1-polarity-invert:
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -45,11 +45,79 @@ properties:
|
|||
Audio serial port SDOUT Hi-Z control. Sets the Hi-Z
|
||||
configuration for SDOUT pin of amplifier. Logical OR of
|
||||
CS35L45_ASP_TX_HIZ_xxx values.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 3
|
||||
default: 2
|
||||
|
||||
patternProperties:
|
||||
"^cirrus,gpio-ctrl[1-3]$":
|
||||
description:
|
||||
GPIO pins configuration.
|
||||
type: object
|
||||
additionalProperties: false
|
||||
properties:
|
||||
gpio-dir:
|
||||
description:
|
||||
GPIO pin direction. Valid only when 'gpio-ctrl' is 1
|
||||
0 = Output
|
||||
1 = Input
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
default: 1
|
||||
gpio-lvl:
|
||||
description:
|
||||
GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0
|
||||
0 = Low
|
||||
1 = High
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
default: 0
|
||||
gpio-op-cfg:
|
||||
description:
|
||||
GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0
|
||||
0 = CMOS
|
||||
1 = Open Drain
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
default: 0
|
||||
gpio-pol:
|
||||
description:
|
||||
GPIO output polarity select. Valid only when 'gpio-ctrl' is 1
|
||||
and 'gpio-dir' is 0
|
||||
0 = Non-inverted, Active High
|
||||
1 = Inverted, Active Low
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
default: 0
|
||||
gpio-ctrl:
|
||||
description:
|
||||
Defines the function of the GPIO pin.
|
||||
GPIO1
|
||||
0 = High impedance input
|
||||
1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
|
||||
2 = Pin acts as MDSYNC, direction controlled by MDSYNC
|
||||
3-7 = Reserved
|
||||
GPIO2
|
||||
0 = High impedance input
|
||||
1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
|
||||
2 = Pin acts as open drain INT
|
||||
3 = Reserved
|
||||
4 = Pin acts as push-pull output INT. Active low.
|
||||
5 = Pin acts as push-pull output INT. Active high.
|
||||
6,7 = Reserved
|
||||
GPIO3
|
||||
0 = High impedance input
|
||||
1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
|
||||
2-7 = Reserved
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
default: 0
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
@ -74,5 +142,15 @@ examples:
|
|||
reset-gpios = <&gpio 110 0>;
|
||||
cirrus,asp-sdout-hiz-ctrl = <(CS35L45_ASP_TX_HIZ_UNUSED |
|
||||
CS35L45_ASP_TX_HIZ_DISABLED)>;
|
||||
cirrus,gpio-ctrl1 {
|
||||
gpio-ctrl = <0x2>;
|
||||
};
|
||||
cirrus,gpio-ctrl2 {
|
||||
gpio-ctrl = <0x2>;
|
||||
};
|
||||
cirrus,gpio-ctrl3 {
|
||||
gpio-ctrl = <0x1>;
|
||||
gpio-dir = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ properties:
|
|||
This is "normal tip sense (TS)" in the datasheet.
|
||||
|
||||
The CS42L42_TS_INV_* defines are available for this.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
|
||||
|
|
@ -87,7 +87,7 @@ properties:
|
|||
7 - 1.5s
|
||||
|
||||
The CS42L42_TS_DBNCE_* defines are available for this.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
|
|
@ -106,7 +106,7 @@ properties:
|
|||
7 - 1.5s
|
||||
|
||||
The CS42L42_TS_DBNCE_* defines are available for this.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 7
|
||||
|
||||
|
|
@ -120,7 +120,7 @@ properties:
|
|||
|
||||
0ms - 200ms,
|
||||
Default = 100ms
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 200
|
||||
|
||||
|
|
@ -133,7 +133,7 @@ properties:
|
|||
|
||||
0ms - 20ms,
|
||||
Default = 10ms
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 20
|
||||
|
||||
|
|
@ -169,7 +169,7 @@ properties:
|
|||
3 - Slowest
|
||||
|
||||
The CS42L42_HSBIAS_RAMP_* defines are available for this.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 3
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,66 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/cirrus,ep9301-i2s.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cirrus EP93xx I2S Controller
|
||||
|
||||
description: |
|
||||
The I2S controller is used to stream serial audio data between the external
|
||||
I2S CODECs’, ADCs/DACs, and the ARM Core. The controller supports I2S, Left-
|
||||
and Right-Justified DSP formats.
|
||||
|
||||
maintainers:
|
||||
- Alexander Sverdlin <alexander.sverdlin@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cirrus,ep9301-i2s
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: sclk
|
||||
- const: lrclk
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#sound-dai-cells'
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2s: i2s@80820000 {
|
||||
compatible = "cirrus,ep9301-i2s";
|
||||
#sound-dai-cells = <0>;
|
||||
reg = <0x80820000 0x100>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <28>;
|
||||
clocks = <&syscon 29>,
|
||||
<&syscon 30>,
|
||||
<&syscon 31>;
|
||||
clock-names = "mclk", "sclk", "lrclk";
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -28,6 +28,10 @@ properties:
|
|||
items:
|
||||
- const: mclk
|
||||
|
||||
port:
|
||||
$ref: audio-graph-port.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,117 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/fsl,qmc-audio.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: QMC audio
|
||||
|
||||
maintainers:
|
||||
- Herve Codina <herve.codina@bootlin.com>
|
||||
|
||||
description: |
|
||||
The QMC audio is an ASoC component which uses QMC (QUICC Multichannel
|
||||
Controller) channels to transfer the audio data.
|
||||
It provides as many DAI as the number of QMC channel used.
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,qmc-audio
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
'#size-cells':
|
||||
const: 0
|
||||
'#sound-dai-cells':
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
'^dai@([0-9]|[1-5][0-9]|6[0-3])$':
|
||||
description:
|
||||
A DAI managed by this controller
|
||||
type: object
|
||||
|
||||
properties:
|
||||
reg:
|
||||
minimum: 0
|
||||
maximum: 63
|
||||
description:
|
||||
The DAI number
|
||||
|
||||
fsl,qmc-chan:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
- items:
|
||||
- description: phandle to QMC node
|
||||
- description: Channel number
|
||||
description:
|
||||
Should be a phandle/number pair. The phandle to QMC node and the QMC
|
||||
channel to use for this DAI.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- fsl,qmc-chan
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
- '#sound-dai-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
audio_controller: audio-controller {
|
||||
compatible = "fsl,qmc-audio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#sound-dai-cells = <1>;
|
||||
dai@16 {
|
||||
reg = <16>;
|
||||
fsl,qmc-chan = <&qmc 16>;
|
||||
};
|
||||
dai@17 {
|
||||
reg = <17>;
|
||||
fsl,qmc-chan = <&qmc 17>;
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
simple-audio-card,dai-link@0 {
|
||||
reg = <0>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&audio_controller 16>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&codec1>;
|
||||
dai-tdm-slot-num = <4>;
|
||||
dai-tdm-slot-width = <8>;
|
||||
/* TS 3, 5, 7, 9 */
|
||||
dai-tdm-slot-tx-mask = <0 0 0 1 0 1 0 1 0 1>;
|
||||
dai-tdm-slot-rx-mask = <0 0 0 1 0 1 0 1 0 1>;
|
||||
};
|
||||
};
|
||||
simple-audio-card,dai-link@1 {
|
||||
reg = <1>;
|
||||
format = "dsp_b";
|
||||
cpu {
|
||||
sound-dai = <&audio_controller 17>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&codec2>;
|
||||
dai-tdm-slot-num = <4>;
|
||||
dai-tdm-slot-width = <8>;
|
||||
/* TS 2, 4, 6, 8 */
|
||||
dai-tdm-slot-tx-mask = <0 0 1 0 1 0 1 0 1>;
|
||||
dai-tdm-slot-rx-mask = <0 0 1 0 1 0 1 0 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
max98371 codec
|
||||
|
||||
This device supports I2C mode only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "maxim,max98371"
|
||||
- reg : The chip select number on the I2C bus
|
||||
|
||||
Example:
|
||||
|
||||
&i2c {
|
||||
max98371: max98371@31 {
|
||||
compatible = "maxim,max98371";
|
||||
reg = <0x31>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,17 +0,0 @@
|
|||
max9867 codec
|
||||
|
||||
This device supports I2C mode only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "maxim,max9867"
|
||||
- reg : The chip select number on the I2C bus
|
||||
|
||||
Example:
|
||||
|
||||
&i2c {
|
||||
max9867: max9867@18 {
|
||||
compatible = "maxim,max9867";
|
||||
reg = <0x18>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
Maxim MAX9759 Speaker Amplifier
|
||||
===============================
|
||||
|
||||
Required properties:
|
||||
- compatible : "maxim,max9759"
|
||||
- shutdown-gpios : the gpio connected to the shutdown pin
|
||||
- mute-gpios : the gpio connected to the mute pin
|
||||
- gain-gpios : the 2 gpios connected to the g1 and g2 pins
|
||||
|
||||
Example:
|
||||
|
||||
max9759: analog-amplifier {
|
||||
compatible = "maxim,max9759";
|
||||
shutdown-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
|
||||
mute-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||
gain-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>,
|
||||
<&gpio3 25 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/maxim,max9759.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Maxim MAX9759 Speaker Amplifier
|
||||
|
||||
maintainers:
|
||||
- Otabek Nazrullaev <otabeknazrullaev1998@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: maxim,max9759
|
||||
|
||||
shutdown-gpios:
|
||||
maxItems: 1
|
||||
description: the gpio connected to the shutdown pin
|
||||
|
||||
mute-gpios:
|
||||
maxItems: 1
|
||||
description: the gpio connected to the mute pin
|
||||
|
||||
gain-gpios:
|
||||
maxItems: 2
|
||||
description: the 2 gpios connected to the g1 and g2 pins
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- shutdown-gpios
|
||||
- mute-gpios
|
||||
- gain-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
amplifier {
|
||||
compatible = "maxim,max9759";
|
||||
shutdown-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
|
||||
mute-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||
gain-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>,
|
||||
<&gpio3 25 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/maxim,max98371.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Maxim MAX98371 audio codec
|
||||
|
||||
maintainers:
|
||||
- anish kumar <yesanishhere@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: maxim,max98371
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
codec@31 {
|
||||
compatible = "maxim,max98371";
|
||||
reg = <0x31>;
|
||||
#sound-dai-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/maxim,max9867.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Maxim Integrated MAX9867 CODEC
|
||||
|
||||
description: |
|
||||
This device supports I2C only.
|
||||
Pins on the device (for linking into audio routes):
|
||||
* LOUT
|
||||
* ROUT
|
||||
* LINL
|
||||
* LINR
|
||||
* MICL
|
||||
* MICR
|
||||
* DMICL
|
||||
* DMICR
|
||||
|
||||
maintainers:
|
||||
- Ladislav Michl <ladis@linux-mips.org>
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- maxim,max9867
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@18 {
|
||||
compatible = "maxim,max9867";
|
||||
#sound-dai-cells = <0>;
|
||||
reg = <0x18>;
|
||||
clocks = <&codec_clk>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -26,15 +26,15 @@ properties:
|
|||
const: audiosys
|
||||
|
||||
mediatek,apmixedsys:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the mediatek apmixedsys controller
|
||||
|
||||
mediatek,infracfg:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the mediatek infracfg controller
|
||||
|
||||
mediatek,topckgen:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the mediatek topckgen controller
|
||||
|
||||
clocks:
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ properties:
|
|||
- mediatek,mt8186-mt6366-da7219-max98357-sound
|
||||
|
||||
mediatek,platform:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of MT8186 ASoC platform.
|
||||
|
||||
headset-codec:
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ properties:
|
|||
- mediatek,mt8186-mt6366-rt5682s-max98360-sound
|
||||
|
||||
mediatek,platform:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of MT8186 ASoC platform.
|
||||
|
||||
dmic-gpios:
|
||||
|
|
|
|||
|
|
@ -24,15 +24,15 @@ properties:
|
|||
const: audiosys
|
||||
|
||||
mediatek,apmixedsys:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the mediatek apmixedsys controller
|
||||
|
||||
mediatek,infracfg:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the mediatek infracfg controller
|
||||
|
||||
mediatek,topckgen:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the mediatek topckgen controller
|
||||
|
||||
power-domains:
|
||||
|
|
|
|||
|
|
@ -21,11 +21,11 @@ properties:
|
|||
- mediatek,mt8192_mt6359_rt1015p_rt5682s
|
||||
|
||||
mediatek,platform:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of MT8192 ASoC platform.
|
||||
|
||||
mediatek,hdmi-codec:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of HDMI codec.
|
||||
|
||||
headset-codec:
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ properties:
|
|||
See ../reserved-memory/reserved-memory.txt for details.
|
||||
|
||||
mediatek,topckgen:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of the mediatek topckgen controller
|
||||
|
||||
power-domains:
|
||||
|
|
|
|||
|
|
@ -24,19 +24,19 @@ properties:
|
|||
description: User specified audio sound card name
|
||||
|
||||
mediatek,platform:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of MT8195 ASoC platform.
|
||||
|
||||
mediatek,dptx-codec:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of MT8195 Display Port Tx codec node.
|
||||
|
||||
mediatek,hdmi-codec:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of MT8195 HDMI codec node.
|
||||
|
||||
mediatek,adsp:
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: The phandle of MT8195 ADSP platform.
|
||||
|
||||
mediatek,dai-link:
|
||||
|
|
|
|||
|
|
@ -74,6 +74,9 @@ Optional properties:
|
|||
- nuvoton,adcout-drive-strong: make the drive strength of ADCOUT IO PIN strong if set.
|
||||
Otherwise, the drive keeps normal strength.
|
||||
|
||||
- nuvoton,adc-delay-ms: Delay (in ms) to make input path stable and avoid pop noise. The
|
||||
default value is 125 and range between 125 to 500 ms.
|
||||
|
||||
- clocks: list of phandle and clock specifier pairs according to common clock bindings for the
|
||||
clocks described in clock-names
|
||||
- clock-names: should include "mclk" for the MCLK master clock
|
||||
|
|
|
|||
|
|
@ -31,10 +31,10 @@ properties:
|
|||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headset Stereophone"
|
||||
- "Int Spk"
|
||||
- "Headset Mic"
|
||||
- "Digital Mic"
|
||||
- Headset Stereophone
|
||||
- Int Spk
|
||||
- Headset Mic
|
||||
- Digital Mic
|
||||
|
||||
# CODEC Pins
|
||||
- SPKOUT
|
||||
|
|
|
|||
|
|
@ -80,4 +80,8 @@ properties:
|
|||
type: boolean
|
||||
description: The Mic Jack represents state of the headset microphone pin
|
||||
|
||||
nvidia,coupled-mic-hp-det:
|
||||
type: boolean
|
||||
description: The Mic detect GPIO is viable only if HP detect GPIO is active
|
||||
|
||||
additionalProperties: true
|
||||
|
|
|
|||
|
|
@ -0,0 +1,90 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-max9808x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with MAX9808x CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-max98088(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-max98088
|
||||
- items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-max98089(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-max98089
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Int Spk"
|
||||
- "Headphone Jack"
|
||||
- "Earpiece"
|
||||
- "Headset Mic"
|
||||
- "Internal Mic 1"
|
||||
- "Internal Mic 2"
|
||||
|
||||
# CODEC Pins
|
||||
- HPL
|
||||
- HPR
|
||||
- SPKL
|
||||
- SPKR
|
||||
- RECL
|
||||
- RECR
|
||||
- INA1
|
||||
- INA2
|
||||
- INB1
|
||||
- INB2
|
||||
- MIC1
|
||||
- MIC2
|
||||
- MICBIAS
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra30-car.h>
|
||||
#include <dt-bindings/soc/tegra-pmc.h>
|
||||
sound {
|
||||
compatible = "lge,tegra-audio-max98089-p895",
|
||||
"nvidia,tegra-audio-max98089";
|
||||
nvidia,model = "LG Optimus Vu MAX98089";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "HPL",
|
||||
"Headphone Jack", "HPR",
|
||||
"Int Spk", "SPKL",
|
||||
"Int Spk", "SPKR",
|
||||
"Earpiece", "RECL",
|
||||
"Earpiece", "RECR",
|
||||
"INA1", "Headset Mic",
|
||||
"MIC1", "MICBIAS",
|
||||
"MICBIAS", "Internal Mic 1",
|
||||
"MIC2", "Internal Mic 2";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s0>;
|
||||
nvidia,audio-codec = <&codec>;
|
||||
|
||||
clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
|
||||
<&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
|
||||
<&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
|
|
@ -38,10 +38,10 @@ properties:
|
|||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphones"
|
||||
- "Speakers"
|
||||
- "Mic Jack"
|
||||
- "Int Mic"
|
||||
- Headphones
|
||||
- Speakers
|
||||
- Mic Jack
|
||||
- Int Mic
|
||||
|
||||
# CODEC Pins
|
||||
- MIC1
|
||||
|
|
|
|||
|
|
@ -0,0 +1,85 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5631.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra audio complex with RT5631 CODEC
|
||||
|
||||
maintainers:
|
||||
- Jon Hunter <jonathanh@nvidia.com>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nvidia,tegra-audio-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- pattern: '^[a-z0-9]+,tegra-audio-rt5631(-[a-z0-9]+)+$'
|
||||
- const: nvidia,tegra-audio-rt5631
|
||||
|
||||
nvidia,audio-routing:
|
||||
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
|
||||
description: |
|
||||
A list of the connections between audio components.
|
||||
Each entry is a pair of strings, the first being the connection's sink,
|
||||
the second being the connection's source. Valid names for sources and
|
||||
sinks are the pins (documented in the binding document),
|
||||
and the jacks on the board.
|
||||
minItems: 2
|
||||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Int Spk"
|
||||
- "Headphone Jack"
|
||||
- "Mic Jack"
|
||||
- "Int Mic"
|
||||
|
||||
# CODEC Pins
|
||||
- MIC1
|
||||
- MIC2
|
||||
- AXIL
|
||||
- AXIR
|
||||
- MONOIN_RXN
|
||||
- MONOIN_RXP
|
||||
- DMIC
|
||||
- MIC Bias1
|
||||
- MIC Bias2
|
||||
- MONO_IN
|
||||
- AUXO1
|
||||
- AUXO2
|
||||
- SPOL
|
||||
- SPOR
|
||||
- HPOL
|
||||
- HPOR
|
||||
- MONO
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/tegra30-car.h>
|
||||
#include <dt-bindings/soc/tegra-pmc.h>
|
||||
sound {
|
||||
compatible = "asus,tegra-audio-rt5631-tf700t",
|
||||
"nvidia,tegra-audio-rt5631";
|
||||
nvidia,model = "Asus Transformer Infinity TF700T RT5631";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "HPOL",
|
||||
"Headphone Jack", "HPOR",
|
||||
"Int Spk", "SPOL",
|
||||
"Int Spk", "SPOR",
|
||||
"MIC1", "MIC Bias1",
|
||||
"MIC Bias1", "Mic Jack",
|
||||
"DMIC", "Int Mic";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&rt5631>;
|
||||
|
||||
clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
|
||||
<&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
|
||||
<&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
|
|
@ -31,9 +31,9 @@ properties:
|
|||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphones"
|
||||
- "Speakers"
|
||||
- "Mic Jack"
|
||||
- Headphones
|
||||
- Speakers
|
||||
- Mic Jack
|
||||
|
||||
# CODEC Pins
|
||||
- DMIC1
|
||||
|
|
|
|||
|
|
@ -31,11 +31,11 @@ properties:
|
|||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone"
|
||||
- "Speaker"
|
||||
- "Headset Mic"
|
||||
- "Internal Mic 1"
|
||||
- "Internal Mic 2"
|
||||
- Headphone
|
||||
- Speaker
|
||||
- Headset Mic
|
||||
- Internal Mic 1
|
||||
- Internal Mic 2
|
||||
|
||||
# CODEC Pins
|
||||
- IN1P
|
||||
|
|
@ -47,14 +47,14 @@ properties:
|
|||
- DMIC2
|
||||
- DMIC3
|
||||
- DMIC4
|
||||
- "DMIC L1"
|
||||
- "DMIC L2"
|
||||
- "DMIC L3"
|
||||
- "DMIC L4"
|
||||
- "DMIC R1"
|
||||
- "DMIC R2"
|
||||
- "DMIC R3"
|
||||
- "DMIC R4"
|
||||
- DMIC L1
|
||||
- DMIC L2
|
||||
- DMIC L3
|
||||
- DMIC L4
|
||||
- DMIC R1
|
||||
- DMIC R2
|
||||
- DMIC R3
|
||||
- DMIC R4
|
||||
- LOUT1
|
||||
- LOUT2
|
||||
- LOUT3
|
||||
|
|
|
|||
|
|
@ -31,9 +31,9 @@ properties:
|
|||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone Jack"
|
||||
- "Line In Jack"
|
||||
- "Mic Jack"
|
||||
- Headphone Jack
|
||||
- Line In Jack
|
||||
- Mic Jack
|
||||
|
||||
# CODEC Pins
|
||||
- HP_OUT
|
||||
|
|
|
|||
|
|
@ -31,8 +31,8 @@ properties:
|
|||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone Jack"
|
||||
- "Mic Jack"
|
||||
- Headphone Jack
|
||||
- Mic Jack
|
||||
|
||||
# CODEC Pins
|
||||
- LOUT1
|
||||
|
|
@ -53,7 +53,7 @@ properties:
|
|||
- MIC1
|
||||
- MIC2N
|
||||
- MIC2
|
||||
- "Mic Bias"
|
||||
- Mic Bias
|
||||
|
||||
required:
|
||||
- nvidia,i2s-controller
|
||||
|
|
|
|||
|
|
@ -35,10 +35,10 @@ properties:
|
|||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone Jack"
|
||||
- "Int Spk"
|
||||
- "Mic Jack"
|
||||
- "Int Mic"
|
||||
- Headphone Jack
|
||||
- Int Spk
|
||||
- Mic Jack
|
||||
- Int Mic
|
||||
|
||||
# CODEC Pins
|
||||
- IN1L
|
||||
|
|
|
|||
|
|
@ -31,9 +31,9 @@ properties:
|
|||
items:
|
||||
enum:
|
||||
# Board Connectors
|
||||
- "Headphone"
|
||||
- "LineIn"
|
||||
- "Mic"
|
||||
- Headphone
|
||||
- LineIn
|
||||
- Mic
|
||||
|
||||
# CODEC Pins
|
||||
- MONOOUT
|
||||
|
|
@ -48,7 +48,7 @@ properties:
|
|||
- PCBEEP
|
||||
- MIC1
|
||||
- MIC2
|
||||
- "Mic Bias"
|
||||
- Mic Bias
|
||||
|
||||
required:
|
||||
- nvidia,ac97-controller
|
||||
|
|
|
|||
|
|
@ -9,15 +9,13 @@ title: LPASS(Low Power Audio Subsystem) RX Macro audio codec
|
|||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7280-lpass-rx-macro
|
||||
- qcom,sm8250-lpass-rx-macro
|
||||
- qcom,sm8450-lpass-rx-macro
|
||||
- qcom,sm8550-lpass-rx-macro
|
||||
- qcom,sc8280xp-lpass-rx-macro
|
||||
|
||||
reg:
|
||||
|
|
@ -30,20 +28,12 @@ properties:
|
|||
const: 0
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 5
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items: # for ADSP based platforms
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
- items: # for ADSP bypass based platforms
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: fsgen
|
||||
minItems: 3
|
||||
maxItems: 5
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
|
@ -61,6 +51,65 @@ required:
|
|||
- reg
|
||||
- "#sound-dai-cells"
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7280-lpass-rx-macro
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items: # for ADSP based platforms
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
- items: # for ADSP bypass based platforms
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: fsgen
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8280xp-lpass-rx-macro
|
||||
- qcom,sm8250-lpass-rx-macro
|
||||
- qcom,sm8450-lpass-rx-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 5
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm8550-lpass-rx-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -9,15 +9,13 @@ title: LPASS(Low Power Audio Subsystem) TX Macro audio codec
|
|||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7280-lpass-tx-macro
|
||||
- qcom,sm8250-lpass-tx-macro
|
||||
- qcom,sm8450-lpass-tx-macro
|
||||
- qcom,sm8550-lpass-tx-macro
|
||||
- qcom,sc8280xp-lpass-tx-macro
|
||||
|
||||
reg:
|
||||
|
|
@ -30,22 +28,12 @@ properties:
|
|||
const: 0
|
||||
|
||||
clocks:
|
||||
oneOf:
|
||||
- maxItems: 3
|
||||
- maxItems: 5
|
||||
minItems: 3
|
||||
maxItems: 5
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items: # for ADSP based platforms
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
- items: # for ADSP bypass based platforms
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: fsgen
|
||||
minItems: 3
|
||||
maxItems: 5
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
|
@ -67,6 +55,65 @@ required:
|
|||
- reg
|
||||
- "#sound-dai-cells"
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7280-lpass-tx-macro
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items: # for ADSP based platforms
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
- items: # for ADSP bypass based platforms
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: fsgen
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc8280xp-lpass-tx-macro
|
||||
- qcom,sm8250-lpass-tx-macro
|
||||
- qcom,sm8450-lpass-tx-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 5
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: npl
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm8550-lpass-tx-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -9,15 +9,13 @@ title: LPASS(Low Power Audio Subsystem) VA Macro audio codec
|
|||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sc7280-lpass-va-macro
|
||||
- qcom,sm8250-lpass-va-macro
|
||||
- qcom,sm8450-lpass-va-macro
|
||||
- qcom,sm8550-lpass-va-macro
|
||||
- qcom,sc8280xp-lpass-va-macro
|
||||
|
||||
reg:
|
||||
|
|
@ -30,16 +28,12 @@ properties:
|
|||
const: 0
|
||||
|
||||
clocks:
|
||||
maxItems: 3
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items: # for ADSP based platforms
|
||||
- const: mclk
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- items: # for ADSP bypass based platforms
|
||||
- const: mclk
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
|
@ -63,6 +57,76 @@ required:
|
|||
- compatible
|
||||
- reg
|
||||
- "#sound-dai-cells"
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,sc7280-lpass-va-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,sm8250-lpass-va-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sc8280xp-lpass-va-macro
|
||||
- qcom,sm8450-lpass-va-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: npl
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8550-lpass-va-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ properties:
|
|||
- qcom,sc7280-lpass-wsa-macro
|
||||
- qcom,sm8250-lpass-wsa-macro
|
||||
- qcom,sm8450-lpass-wsa-macro
|
||||
- qcom,sm8550-lpass-wsa-macro
|
||||
- qcom,sc8280xp-lpass-wsa-macro
|
||||
|
||||
reg:
|
||||
|
|
@ -27,11 +28,11 @@ properties:
|
|||
const: 0
|
||||
|
||||
clocks:
|
||||
minItems: 5
|
||||
minItems: 4
|
||||
maxItems: 6
|
||||
|
||||
clock-names:
|
||||
minItems: 5
|
||||
minItems: 4
|
||||
maxItems: 6
|
||||
|
||||
clock-output-names:
|
||||
|
|
@ -62,6 +63,7 @@ allOf:
|
|||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 5
|
||||
maxItems: 5
|
||||
clock-names:
|
||||
items:
|
||||
|
|
@ -89,6 +91,23 @@ allOf:
|
|||
- const: va
|
||||
- const: fsgen
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm8550-lpass-wsa-macro
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: macro
|
||||
- const: dcodec
|
||||
- const: fsgen
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -56,7 +56,7 @@ patternProperties:
|
|||
Compress offload dai.
|
||||
|
||||
dependencies:
|
||||
is-compress-dai: ["direction"]
|
||||
is-compress-dai: [ direction ]
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -1,123 +0,0 @@
|
|||
QCOM WCD9335 Codec
|
||||
|
||||
Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC, supports
|
||||
Qualcomm Technologies, Inc. (QTI) multimedia solutions, including
|
||||
the MSM8996, MSM8976, and MSM8956 chipsets. It has in-built
|
||||
Soundwire controller, interrupt mux. It supports both I2S/I2C and
|
||||
SLIMbus audio interfaces.
|
||||
|
||||
Required properties with SLIMbus Interface:
|
||||
|
||||
- compatible:
|
||||
Usage: required
|
||||
Value type: <stringlist>
|
||||
Definition: For SLIMbus interface it should be "slimMID,PID",
|
||||
textual representation of Manufacturer ID, Product Code,
|
||||
shall be in lower case hexadecimal with leading zeroes
|
||||
suppressed. Refer to slimbus/bus.txt for details.
|
||||
Should be:
|
||||
"slim217,1a0" for MSM8996 and APQ8096 SoCs with SLIMbus.
|
||||
|
||||
- reg
|
||||
Usage: required
|
||||
Value type: <u32 u32>
|
||||
Definition: Should be ('Device index', 'Instance ID')
|
||||
|
||||
- interrupts
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: Interrupts via WCD INTR1 and INTR2 pins
|
||||
|
||||
- interrupt-names:
|
||||
Usage: required
|
||||
Value type: <String array>
|
||||
Definition: Interrupt names of WCD INTR1 and INTR2
|
||||
Should be: "intr1", "intr2"
|
||||
|
||||
- reset-gpios:
|
||||
Usage: required
|
||||
Value type: <String Array>
|
||||
Definition: Reset gpio line
|
||||
|
||||
- slim-ifc-dev:
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: SLIM interface device
|
||||
|
||||
- clocks:
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: See clock-bindings.txt section "consumers". List of
|
||||
three clock specifiers for mclk, mclk2 and slimbus clock.
|
||||
|
||||
- clock-names:
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Must contain "mclk", "mclk2" and "slimbus" strings.
|
||||
|
||||
- vdd-buck-supply:
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: Should contain a reference to the 1.8V buck supply
|
||||
|
||||
- vdd-buck-sido-supply:
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: Should contain a reference to the 1.8V SIDO buck supply
|
||||
|
||||
- vdd-rx-supply:
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: Should contain a reference to the 1.8V rx supply
|
||||
|
||||
- vdd-tx-supply:
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: Should contain a reference to the 1.8V tx supply
|
||||
|
||||
- vdd-vbat-supply:
|
||||
Usage: Optional
|
||||
Value type: <phandle>
|
||||
Definition: Should contain a reference to the vbat supply
|
||||
|
||||
- vdd-micbias-supply:
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: Should contain a reference to the micbias supply
|
||||
|
||||
- vdd-io-supply:
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: Should contain a reference to the 1.8V io supply
|
||||
|
||||
- interrupt-controller:
|
||||
Usage: required
|
||||
Definition: Indicating that this is a interrupt controller
|
||||
|
||||
- #interrupt-cells:
|
||||
Usage: required
|
||||
Value type: <int>
|
||||
Definition: should be 1
|
||||
|
||||
#sound-dai-cells
|
||||
Usage: required
|
||||
Value type: <u32>
|
||||
Definition: Must be 1
|
||||
|
||||
audio-codec@1{
|
||||
compatible = "slim217,1a0";
|
||||
reg = <1 0>;
|
||||
interrupts = <&msmgpio 54 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "intr2"
|
||||
reset-gpios = <&msmgpio 64 GPIO_ACTIVE_LOW>;
|
||||
slim-ifc-dev = <&wc9335_ifd>;
|
||||
clock-names = "mclk", "native";
|
||||
clocks = <&rpmcc RPM_SMD_DIV_CLK1>,
|
||||
<&rpmcc RPM_SMD_BB_CLK1>;
|
||||
vdd-buck-supply = <&pm8994_s4>;
|
||||
vdd-rx-supply = <&pm8994_s4>;
|
||||
vdd-buck-sido-supply = <&pm8994_s4>;
|
||||
vdd-tx-supply = <&pm8994_s4>;
|
||||
vdd-io-supply = <&pm8994_s4>;
|
||||
#sound-dai-cells = <1>;
|
||||
}
|
||||
|
|
@ -0,0 +1,156 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/qcom,wcd9335.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm WCD9335 Audio Codec
|
||||
|
||||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
description:
|
||||
Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC with in-built
|
||||
Soundwire controller and interrupt mux. It supports both I2S/I2C and SLIMbus
|
||||
audio interfaces.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: slim217,1a0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
- const: slimbus
|
||||
|
||||
interrupts:
|
||||
maxItems: 2
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: intr1
|
||||
- const: intr2
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
slim-ifc-dev:
|
||||
description: SLIM IFC device interface
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 1
|
||||
|
||||
vdd-buck-supply:
|
||||
description: 1.8V buck supply
|
||||
|
||||
vdd-buck-sido-supply:
|
||||
description: 1.8V SIDO buck supply
|
||||
|
||||
vdd-io-supply:
|
||||
description: 1.8V I/O supply
|
||||
|
||||
vdd-micbias-supply:
|
||||
description: micbias supply
|
||||
|
||||
vdd-rx-supply:
|
||||
description: 1.8V rx supply
|
||||
|
||||
vdd-tx-supply:
|
||||
description: 1.8V tx supply
|
||||
|
||||
vdd-vbat-supply:
|
||||
description: vbat supply
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
- if:
|
||||
required:
|
||||
- slim-ifc-dev
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
- clock-names
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- interrupt-controller
|
||||
- '#interrupt-cells'
|
||||
- reset-gpios
|
||||
- slim-ifc-dev
|
||||
- '#sound-dai-cells'
|
||||
- vdd-buck-supply
|
||||
- vdd-buck-sido-supply
|
||||
- vdd-io-supply
|
||||
- vdd-rx-supply
|
||||
- vdd-tx-supply
|
||||
else:
|
||||
properties:
|
||||
clocks: false
|
||||
clock-names: false
|
||||
interrupts: false
|
||||
interrupt-names: false
|
||||
interrupt-controller: false
|
||||
'#interrupt-cells': false
|
||||
reset-gpios: false
|
||||
slim-ifc-dev: false
|
||||
'#sound-dai-cells': false
|
||||
vdd-buck-supply: false
|
||||
vdd-buck-sido-supply: false
|
||||
vdd-io-supply: false
|
||||
vdd-micbias-supply: false
|
||||
vdd-rx-supply: false
|
||||
vdd-tx-supply: false
|
||||
vdd-vbat-supply: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
tasha_ifd: codec@0,0 {
|
||||
compatible = "slim217,1a0";
|
||||
reg = <0 0>;
|
||||
};
|
||||
|
||||
codec@1,0 {
|
||||
compatible = "slim217,1a0";
|
||||
reg = <1 0>;
|
||||
|
||||
clock-names = "mclk", "slimbus";
|
||||
clocks = <&div1_mclk>, <&rpmcc RPM_SMD_BB_CLK1>;
|
||||
|
||||
interrupt-parent = <&tlmm>;
|
||||
interrupts = <54 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "intr1", "intr2";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
|
||||
slim-ifc-dev = <&tasha_ifd>;
|
||||
#sound-dai-cells = <1>;
|
||||
|
||||
vdd-buck-supply = <&vreg_s4a_1p8>;
|
||||
vdd-buck-sido-supply = <&vreg_s4a_1p8>;
|
||||
vdd-tx-supply = <&vreg_s4a_1p8>;
|
||||
vdd-rx-supply = <&vreg_s4a_1p8>;
|
||||
vdd-io-supply = <&vreg_s4a_1p8>;
|
||||
};
|
||||
|
|
@ -152,6 +152,7 @@ required:
|
|||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
- if:
|
||||
required:
|
||||
- slim-ifc-dev
|
||||
|
|
|
|||
|
|
@ -0,0 +1,63 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/realtek,alc5632.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ALC5632 audio CODEC
|
||||
|
||||
description: |
|
||||
Pins on the device (for linking into audio routes):
|
||||
* SPK_OUTP
|
||||
* SPK_OUTN
|
||||
* HP_OUT_L
|
||||
* HP_OUT_R
|
||||
* AUX_OUT_P
|
||||
* AUX_OUT_N
|
||||
* LINE_IN_L
|
||||
* LINE_IN_R
|
||||
* PHONE_P
|
||||
* PHONE_N
|
||||
* MIC1_P
|
||||
* MIC1_N
|
||||
* MIC2_P
|
||||
* MIC2_N
|
||||
* MICBIAS1
|
||||
* DMICDAT
|
||||
|
||||
maintainers:
|
||||
- Leon Romanovsky <leon@leon.nu>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: realtek,alc5632
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#gpio-cells'
|
||||
- gpio-controller
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@1a {
|
||||
compatible = "realtek,alc5632";
|
||||
reg = <0x1a>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
|
@ -101,17 +101,7 @@ properties:
|
|||
|
||||
clock-names:
|
||||
description: List of necessary clock names.
|
||||
minItems: 1
|
||||
maxItems: 31
|
||||
items:
|
||||
oneOf:
|
||||
- const: ssi-all
|
||||
- pattern: '^ssi\.[0-9]$'
|
||||
- pattern: '^src\.[0-9]$'
|
||||
- pattern: '^mix\.[0-1]$'
|
||||
- pattern: '^ctu\.[0-1]$'
|
||||
- pattern: '^dvc\.[0-1]$'
|
||||
- pattern: '^clk_(a|b|c|i)$'
|
||||
# details are defined below
|
||||
|
||||
ports:
|
||||
$ref: audio-graph-port.yaml#/definitions/port-base
|
||||
|
|
@ -155,7 +145,7 @@ properties:
|
|||
dmas:
|
||||
maxItems: 1
|
||||
dma-names:
|
||||
const: "tx"
|
||||
const: tx
|
||||
required:
|
||||
- dmas
|
||||
- dma-names
|
||||
|
|
@ -288,6 +278,11 @@ required:
|
|||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
# --------------------
|
||||
# reg/reg-names
|
||||
# --------------------
|
||||
# for Gen1
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -303,7 +298,15 @@ allOf:
|
|||
- scu
|
||||
- ssi
|
||||
- adg
|
||||
else:
|
||||
# for Gen2/Gen3
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,rcar_sound-gen2
|
||||
- renesas,rcar_sound-gen3
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 5
|
||||
|
|
@ -315,35 +318,87 @@ allOf:
|
|||
- ssiu
|
||||
- ssi
|
||||
- audmapp
|
||||
# for Gen4
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,rcar_sound-gen4
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 4
|
||||
reg-names:
|
||||
items:
|
||||
enum:
|
||||
- adg
|
||||
- ssiu
|
||||
- ssi
|
||||
- sdmc
|
||||
|
||||
# --------------------
|
||||
# clock-names
|
||||
# --------------------
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,rcar_sound-gen4
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
maxItems: 3
|
||||
items:
|
||||
enum:
|
||||
- ssi.0
|
||||
- ssiu.0
|
||||
- clkin
|
||||
else:
|
||||
properties:
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 31
|
||||
items:
|
||||
oneOf:
|
||||
- const: ssi-all
|
||||
- pattern: '^ssi\.[0-9]$'
|
||||
- pattern: '^src\.[0-9]$'
|
||||
- pattern: '^mix\.[0-1]$'
|
||||
- pattern: '^ctu\.[0-1]$'
|
||||
- pattern: '^dvc\.[0-1]$'
|
||||
- pattern: '^clk_(a|b|c|i)$'
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/power/r8a7790-sysc.h>
|
||||
rcar_sound: sound@ec500000 {
|
||||
#sound-dai-cells = <1>;
|
||||
compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
|
||||
reg = <0xec500000 0x1000>, /* SCU */
|
||||
<0xec5a0000 0x100>, /* ADG */
|
||||
<0xec540000 0x1000>, /* SSIU */
|
||||
<0xec541000 0x1280>, /* SSI */
|
||||
<0xec541000 0x280>, /* SSI */
|
||||
<0xec740000 0x200>; /* Audio DMAC peri peri*/
|
||||
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
|
||||
|
||||
clocks = <&mstp10_clks 1005>, /* SSI-ALL */
|
||||
<&mstp10_clks 1006>, <&mstp10_clks 1007>, /* SSI9, SSI8 */
|
||||
<&mstp10_clks 1008>, <&mstp10_clks 1009>, /* SSI7, SSI6 */
|
||||
<&mstp10_clks 1010>, <&mstp10_clks 1011>, /* SSI5, SSI4 */
|
||||
<&mstp10_clks 1012>, <&mstp10_clks 1013>, /* SSI3, SSI2 */
|
||||
<&mstp10_clks 1014>, <&mstp10_clks 1015>, /* SSI1, SSI0 */
|
||||
<&mstp10_clks 1022>, <&mstp10_clks 1023>, /* SRC9, SRC8 */
|
||||
<&mstp10_clks 1024>, <&mstp10_clks 1025>, /* SRC7, SRC6 */
|
||||
<&mstp10_clks 1026>, <&mstp10_clks 1027>, /* SRC5, SRC4 */
|
||||
<&mstp10_clks 1028>, <&mstp10_clks 1029>, /* SRC3, SRC2 */
|
||||
<&mstp10_clks 1030>, <&mstp10_clks 1031>, /* SRC1, SRC0 */
|
||||
<&mstp10_clks 1020>, <&mstp10_clks 1021>, /* MIX1, MIX0 */
|
||||
<&mstp10_clks 1020>, <&mstp10_clks 1021>, /* CTU1, CTU0 */
|
||||
<&mstp10_clks 1019>, <&mstp10_clks 1018>, /* DVC0, DVC1 */
|
||||
clocks = <&cpg CPG_MOD 1005>, /* SSI-ALL */
|
||||
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, /* SSI9, SSI8 */
|
||||
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, /* SSI7, SSI6 */
|
||||
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, /* SSI5, SSI4 */
|
||||
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, /* SSI3, SSI2 */
|
||||
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, /* SSI1, SSI0 */
|
||||
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, /* SRC9, SRC8 */
|
||||
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, /* SRC7, SRC6 */
|
||||
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, /* SRC5, SRC4 */
|
||||
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, /* SRC3, SRC2 */
|
||||
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, /* SRC1, SRC0 */
|
||||
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, /* MIX1, MIX0 */
|
||||
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, /* CTU1, CTU0 */
|
||||
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, /* DVC0, DVC1 */
|
||||
<&audio_clk_a>, <&audio_clk_b>, /* CLKA, CLKB */
|
||||
<&audio_clk_c>, <&audio_clk_i>; /* CLKC, CLKI */
|
||||
|
||||
|
|
@ -364,6 +419,17 @@ examples:
|
|||
"clk_a", "clk_b",
|
||||
"clk_c", "clk_i";
|
||||
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
|
||||
resets = <&cpg 1005>,
|
||||
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
|
||||
<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
|
||||
<&cpg 1014>, <&cpg 1015>;
|
||||
reset-names = "ssi-all",
|
||||
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
|
||||
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
|
||||
"ssi.1", "ssi.0";
|
||||
|
||||
rcar_sound,dvc {
|
||||
dvc0: dvc-0 {
|
||||
dmas = <&audma0 0xbc>;
|
||||
|
|
@ -396,7 +462,7 @@ examples:
|
|||
status = "disabled";
|
||||
};
|
||||
src1: src-1 {
|
||||
interrupts = <0 353 0>;
|
||||
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x87>, <&audma1 0x9c>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
|
|
@ -417,12 +483,12 @@ examples:
|
|||
|
||||
rcar_sound,ssi {
|
||||
ssi0: ssi-0 {
|
||||
interrupts = <0 370 1>;
|
||||
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x01>, <&audma1 0x02>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
ssi1: ssi-1 {
|
||||
interrupts = <0 371 1>;
|
||||
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x03>, <&audma1 0x04>;
|
||||
dma-names = "rx", "tx";
|
||||
};
|
||||
|
|
@ -464,7 +530,6 @@ examples:
|
|||
};
|
||||
};
|
||||
|
||||
|
||||
/* assume audio-graph */
|
||||
codec {
|
||||
port {
|
||||
|
|
|
|||
|
|
@ -25,14 +25,18 @@ properties:
|
|||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 4
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: int_req
|
||||
- const: dma_rx
|
||||
- const: dma_tx
|
||||
- const: dma_rt
|
||||
oneOf:
|
||||
- items:
|
||||
- const: int_req
|
||||
- const: dma_rx
|
||||
- const: dma_tx
|
||||
- items:
|
||||
- const: int_req
|
||||
- const: dma_rt
|
||||
|
||||
clocks:
|
||||
maxItems: 4
|
||||
|
|
@ -106,9 +110,8 @@ examples:
|
|||
reg = <0x10049c00 0x400>;
|
||||
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
|
||||
<GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "int_req", "dma_rx", "dma_tx";
|
||||
clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
|
||||
<&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
|
||||
<&audio_clk1>,
|
||||
|
|
|
|||
|
|
@ -86,6 +86,13 @@ properties:
|
|||
- tx-m
|
||||
- rx-m
|
||||
|
||||
port:
|
||||
$ref: audio-graph-port.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
rockchip,grf:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@ properties:
|
|||
- rockchip,rk3366-i2s
|
||||
- rockchip,rk3368-i2s
|
||||
- rockchip,rk3399-i2s
|
||||
- rockchip,rk3588-i2s
|
||||
- rockchip,rv1126-i2s
|
||||
- const: rockchip,rk3066-i2s
|
||||
|
||||
|
|
@ -82,6 +83,10 @@ properties:
|
|||
resets:
|
||||
maxItems: 2
|
||||
|
||||
port:
|
||||
$ref: audio-graph-port.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
rockchip,capture-channels:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 2
|
||||
|
|
|
|||
|
|
@ -50,7 +50,7 @@ properties:
|
|||
description: The bias voltage to be used in mVolts. The voltage can take
|
||||
values from 1.25V to 3V by 250mV steps. If this node is not mentioned
|
||||
or the value is unknown, then the value is set to 1.25V.
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ]
|
||||
|
||||
lrclk-strength:
|
||||
|
|
@ -63,7 +63,7 @@ properties:
|
|||
1 = 1.66 mA 2.87 mA 4.02 mA
|
||||
2 = 3.33 mA 5.74 mA 8.03 mA
|
||||
3 = 4.99 mA 8.61 mA 12.05 mA
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [ 0, 1, 2, 3 ]
|
||||
|
||||
sclk-strength:
|
||||
|
|
@ -76,7 +76,7 @@ properties:
|
|||
1 = 1.66 mA 2.87 mA 4.02 mA
|
||||
2 = 3.33 mA 5.74 mA 8.03 mA
|
||||
3 = 4.99 mA 8.61 mA 12.05 mA
|
||||
$ref: "/schemas/types.yaml#/definitions/uint32"
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [ 0, 1, 2, 3 ]
|
||||
|
||||
port:
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ definitions:
|
|||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
prefix:
|
||||
description: "device name prefix"
|
||||
description: device name prefix
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
|
||||
label:
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ properties:
|
|||
Specifies a phandle to soc-glue, which is used for changing mode of S/PDIF
|
||||
signal pin to output from Hi-Z. This property is optional if you use I2S
|
||||
signal pins only.
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 1
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ Required properties:
|
|||
- "ti,tas5717",
|
||||
- "ti,tas5719",
|
||||
- "ti,tas5721"
|
||||
- "ti,tas5733"
|
||||
- reg: The I2C address of the device
|
||||
- #sound-dai-cells: must be equal to 0
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,41 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8510.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: WM8510 audio CODEC
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8510
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
codec@1a {
|
||||
compatible = "wlf,wm8510";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8523.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: WM8523 audio CODEC
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8523
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@1a {
|
||||
compatible = "wlf,wm8523";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8524.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Wolfson WM8524 24-bit 192KHz Stereo DAC
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8524
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
wlf,mute-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
a GPIO spec for the MUTE pin.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- wlf,mute-gpios
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
wm8524: codec {
|
||||
compatible = "wlf,wm8524";
|
||||
wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8580.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: WM8580 and WM8581 audio CODEC
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- wlf,wm8580
|
||||
- wlf,wm8581
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@1a {
|
||||
compatible = "wlf,wm8580";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8711.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: WM8711 audio CODEC
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8711
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@1a {
|
||||
compatible = "wlf,wm8711";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8728.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: WM8728 audio CODEC
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8728
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@1a {
|
||||
compatible = "wlf,wm8728";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8737.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: WM8737 audio CODEC
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8737
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@1a {
|
||||
compatible = "wlf,wm8737";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8753.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: WM8753 audio CODEC
|
||||
|
||||
description: |
|
||||
Pins on the device (for linking into audio routes):
|
||||
* LOUT1
|
||||
* LOUT2
|
||||
* ROUT1
|
||||
* ROUT2
|
||||
* MONO1
|
||||
* MONO2
|
||||
* OUT3
|
||||
* OUT4
|
||||
* LINE1
|
||||
* LINE2
|
||||
* RXP
|
||||
* RXN
|
||||
* ACIN
|
||||
* ACOP
|
||||
* MIC1N
|
||||
* MIC1
|
||||
* MIC2N
|
||||
* MIC2
|
||||
* Mic Bias
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8753
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
codec@1a {
|
||||
compatible = "wlf,wm8753";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,88 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8960.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Wolfson WM8960 audio codec
|
||||
|
||||
maintainers:
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: wlf,wm8960
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: mclk
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
wlf,capless:
|
||||
type: boolean
|
||||
description:
|
||||
If present, OUT3 pin will be enabled and disabled together with HP_L and
|
||||
HP_R pins in response to jack detect events.
|
||||
|
||||
wlf,gpio-cfg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 2
|
||||
description: |
|
||||
A list of GPIO configuration register values.
|
||||
- gpio-cfg[0]: ALRCGPIO of R9 (Audio interface)
|
||||
- gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).
|
||||
|
||||
wlf,hp-cfg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 3
|
||||
description: |
|
||||
A list of headphone jack detect configuration register values:
|
||||
- hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).
|
||||
- hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).
|
||||
- hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).
|
||||
|
||||
wlf,shared-lrclk:
|
||||
type: boolean
|
||||
description:
|
||||
If present, the LRCM bit of R24 (Additional control 2) gets set,
|
||||
indicating that ADCLRC and DACLRC pins will be disabled only when ADC
|
||||
(Left and Right) and DAC (Left and Right) are disabled.
|
||||
When WM8960 works on synchronize mode and DACLRC pin is used to supply
|
||||
frame clock, it will no frame clock for captrue unless enable DAC to
|
||||
enable DACLRC pin. If shared-lrclk is present, no need to enable DAC for
|
||||
captrue.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
audio-codec@1a {
|
||||
compatible = "wlf,wm8960";
|
||||
reg = <0x1a>;
|
||||
clocks = <&clks 0>;
|
||||
clock-names = "mclk";
|
||||
#sound-dai-cells = <0>;
|
||||
wlf,hp-cfg = <3 2 3>;
|
||||
wlf,gpio-cfg = <1 3>;
|
||||
wlf,shared-lrclk;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,194 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/sound/wlf,wm8994.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Wolfson WM1811/WM8994/WM8958 audio codecs
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
|
||||
- patches@opensource.cirrus.com
|
||||
|
||||
description: |
|
||||
These devices support both I2C and SPI (configured with pin strapping on the
|
||||
board).
|
||||
|
||||
Pins on the device (for linking into audio routes):
|
||||
IN1LN, IN1LP, IN2LN, IN2LP:VXRN, IN1RN, IN1RP, IN2RN, IN2RP:VXRP, SPKOUTLP,
|
||||
SPKOUTLN, SPKOUTRP, SPKOUTRN, HPOUT1L, HPOUT1R, HPOUT2P, HPOUT2N, LINEOUT1P,
|
||||
LINEOUT1N, LINEOUT2P, LINEOUT2N.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- wlf,wm1811
|
||||
- wlf,wm8994
|
||||
- wlf,wm8958
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: MCLK1
|
||||
- const: MCLK2
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
description:
|
||||
The first cell is the IRQ number. The second cell is the flags, encoded
|
||||
as the trigger masks.
|
||||
|
||||
AVDD1-supply: true
|
||||
AVDD2-supply: true
|
||||
CPVDD-supply: true
|
||||
DBVDD-supply: true
|
||||
DBVDD1-supply: true
|
||||
DBVDD2-supply: true
|
||||
DBVDD3-supply: true
|
||||
DCVDD-supply: true
|
||||
LDO1VDD-supply: true
|
||||
LDO2VDD-supply: true
|
||||
SPKVDD1-supply: true
|
||||
SPKVDD2-supply: true
|
||||
|
||||
'#sound-dai-cells':
|
||||
const: 0
|
||||
|
||||
wlf,gpio-cfg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 11
|
||||
description:
|
||||
A list of GPIO configuration register values. If absent, no configuration
|
||||
of these registers is performed. If any value is over 0xffff then the
|
||||
register will be left as default. If present 11 values must be supplied.
|
||||
|
||||
wlf,micbias-cfg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
maxItems: 2
|
||||
description:
|
||||
Two MICBIAS register values for WM1811 or WM8958. If absent the register
|
||||
defaults will be used.
|
||||
|
||||
wlf,ldo1ena-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
Control of LDO1ENA input to device.
|
||||
|
||||
wlf,ldo2ena-gpios:
|
||||
maxItems: 1
|
||||
description:
|
||||
Control of LDO2ENA input to device.
|
||||
|
||||
wlf,lineout1-se:
|
||||
type: boolean
|
||||
description:
|
||||
LINEOUT1 is in single ended mode.
|
||||
|
||||
wlf,lineout2-se:
|
||||
type: boolean
|
||||
description:
|
||||
INEOUT2 is in single ended mode.
|
||||
|
||||
wlf,lineout1-feedback:
|
||||
type: boolean
|
||||
description:
|
||||
LINEOUT1 has common mode feedback connected.
|
||||
|
||||
wlf,lineout2-feedback:
|
||||
type: boolean
|
||||
description:
|
||||
LINEOUT2 has common mode feedback connected.
|
||||
|
||||
wlf,ldoena-always-driven:
|
||||
type: boolean
|
||||
description:
|
||||
LDOENA is always driven.
|
||||
|
||||
wlf,spkmode-pu:
|
||||
type: boolean
|
||||
description:
|
||||
Enable the internal pull-up resistor on the SPKMODE pin.
|
||||
|
||||
wlf,csnaddr-pd:
|
||||
type: boolean
|
||||
description:
|
||||
Enable the internal pull-down resistor on the CS/ADDR pin.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- AVDD2-supply
|
||||
- CPVDD-supply
|
||||
- SPKVDD1-supply
|
||||
- SPKVDD2-supply
|
||||
|
||||
allOf:
|
||||
- $ref: dai-common.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- wlf,wm1811
|
||||
- wlf,wm8958
|
||||
then:
|
||||
properties:
|
||||
DBVDD-supply: false
|
||||
LDO2VDD-supply: false
|
||||
required:
|
||||
- DBVDD1-supply
|
||||
- DBVDD2-supply
|
||||
- DBVDD3-supply
|
||||
else:
|
||||
properties:
|
||||
DBVDD1-supply: false
|
||||
DBVDD2-supply: false
|
||||
DBVDD3-supply: false
|
||||
required:
|
||||
- DBVDD-supply
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
audio-codec@1a {
|
||||
compatible = "wlf,wm1811";
|
||||
reg = <0x1a>;
|
||||
clocks = <&i2s0 0>;
|
||||
clock-names = "MCLK1";
|
||||
|
||||
AVDD2-supply = <&main_dc_reg>;
|
||||
CPVDD-supply = <&main_dc_reg>;
|
||||
DBVDD1-supply = <&main_dc_reg>;
|
||||
DBVDD2-supply = <&main_dc_reg>;
|
||||
DBVDD3-supply = <&main_dc_reg>;
|
||||
LDO1VDD-supply = <&main_dc_reg>;
|
||||
SPKVDD1-supply = <&main_dc_reg>;
|
||||
SPKVDD2-supply = <&main_dc_reg>;
|
||||
|
||||
wlf,ldo1ena-gpios = <&gpb0 0 GPIO_ACTIVE_HIGH>;
|
||||
wlf,ldo2ena-gpios = <&gpb0 1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
WM8510 audio CODEC
|
||||
|
||||
This device supports both I2C and SPI (configured with pin strapping
|
||||
on the board).
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8510"
|
||||
|
||||
- reg : the I2C address of the device for I2C, the chip select
|
||||
number for SPI.
|
||||
|
||||
Example:
|
||||
|
||||
wm8510: codec@1a {
|
||||
compatible = "wlf,wm8510";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
WM8523 audio CODEC
|
||||
|
||||
This device supports I2C only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8523"
|
||||
|
||||
- reg : the I2C address of the device.
|
||||
|
||||
Example:
|
||||
|
||||
wm8523: codec@1a {
|
||||
compatible = "wlf,wm8523";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
WM8524 audio CODEC
|
||||
|
||||
This device does not use I2C or SPI but a simple Hardware Control Interface.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8524"
|
||||
|
||||
- wlf,mute-gpios: a GPIO spec for the MUTE pin.
|
||||
|
||||
Example:
|
||||
|
||||
wm8524: codec {
|
||||
compatible = "wlf,wm8524";
|
||||
wlf,mute-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
WM8580 and WM8581 audio CODEC
|
||||
|
||||
This device supports I2C only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8580", "wlf,wm8581"
|
||||
|
||||
- reg : the I2C address of the device.
|
||||
|
||||
Example:
|
||||
|
||||
wm8580: codec@1a {
|
||||
compatible = "wlf,wm8580";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
WM8711 audio CODEC
|
||||
|
||||
This device supports both I2C and SPI (configured with pin strapping
|
||||
on the board).
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8711"
|
||||
|
||||
- reg : the I2C address of the device for I2C, the chip select
|
||||
number for SPI.
|
||||
|
||||
Example:
|
||||
|
||||
wm8711: codec@1a {
|
||||
compatible = "wlf,wm8711";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
WM8728 audio CODEC
|
||||
|
||||
This device supports both I2C and SPI (configured with pin strapping
|
||||
on the board).
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8728"
|
||||
|
||||
- reg : the I2C address of the device for I2C, the chip select
|
||||
number for SPI.
|
||||
|
||||
Example:
|
||||
|
||||
wm8728: codec@1a {
|
||||
compatible = "wlf,wm8728";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
WM8737 audio CODEC
|
||||
|
||||
This device supports both I2C and SPI (configured with pin strapping
|
||||
on the board).
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8737"
|
||||
|
||||
- reg : the I2C address of the device for I2C, the chip select
|
||||
number for SPI.
|
||||
|
||||
Example:
|
||||
|
||||
wm8737: codec@1a {
|
||||
compatible = "wlf,wm8737";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
|
@ -1,40 +0,0 @@
|
|||
WM8753 audio CODEC
|
||||
|
||||
This device supports both I2C and SPI (configured with pin strapping
|
||||
on the board).
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8753"
|
||||
|
||||
- reg : the I2C address of the device for I2C, the chip select
|
||||
number for SPI.
|
||||
|
||||
Pins on the device (for linking into audio routes):
|
||||
|
||||
* LOUT1
|
||||
* LOUT2
|
||||
* ROUT1
|
||||
* ROUT2
|
||||
* MONO1
|
||||
* MONO2
|
||||
* OUT3
|
||||
* OUT4
|
||||
* LINE1
|
||||
* LINE2
|
||||
* RXP
|
||||
* RXN
|
||||
* ACIN
|
||||
* ACOP
|
||||
* MIC1N
|
||||
* MIC1
|
||||
* MIC2N
|
||||
* MIC2
|
||||
* Mic Bias
|
||||
|
||||
Example:
|
||||
|
||||
wm8753: codec@1a {
|
||||
compatible = "wlf,wm8753";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
|
@ -1,42 +0,0 @@
|
|||
WM8960 audio CODEC
|
||||
|
||||
This device supports I2C only.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "wlf,wm8960"
|
||||
|
||||
- reg : the I2C address of the device.
|
||||
|
||||
Optional properties:
|
||||
- wlf,shared-lrclk: This is a boolean property. If present, the LRCM bit of
|
||||
R24 (Additional control 2) gets set, indicating that ADCLRC and DACLRC pins
|
||||
will be disabled only when ADC (Left and Right) and DAC (Left and Right)
|
||||
are disabled.
|
||||
When wm8960 works on synchronize mode and DACLRC pin is used to supply
|
||||
frame clock, it will no frame clock for captrue unless enable DAC to enable
|
||||
DACLRC pin. If shared-lrclk is present, no need to enable DAC for captrue.
|
||||
|
||||
- wlf,capless: This is a boolean property. If present, OUT3 pin will be
|
||||
enabled and disabled together with HP_L and HP_R pins in response to jack
|
||||
detect events.
|
||||
|
||||
- wlf,hp-cfg: A list of headphone jack detect configuration register values.
|
||||
The list must be 3 entries long.
|
||||
hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).
|
||||
hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).
|
||||
hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).
|
||||
|
||||
- wlf,gpio-cfg: A list of GPIO configuration register values.
|
||||
The list must be 2 entries long.
|
||||
gpio-cfg[0]: ALRCGPIO of R9 (Audio interface)
|
||||
gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).
|
||||
|
||||
Example:
|
||||
|
||||
wm8960: codec@1a {
|
||||
compatible = "wlf,wm8960";
|
||||
reg = <0x1a>;
|
||||
|
||||
wlf,shared-lrclk;
|
||||
};
|
||||
|
|
@ -1,112 +0,0 @@
|
|||
WM1811/WM8994/WM8958 audio CODEC
|
||||
|
||||
These devices support both I2C and SPI (configured with pin strapping
|
||||
on the board).
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : One of "wlf,wm1811", "wlf,wm8994" or "wlf,wm8958".
|
||||
|
||||
- reg : the I2C address of the device for I2C, the chip select
|
||||
number for SPI.
|
||||
|
||||
- gpio-controller : Indicates this device is a GPIO controller.
|
||||
- #gpio-cells : Must be 2. The first cell is the pin number and the
|
||||
second cell is used to specify optional parameters (currently unused).
|
||||
|
||||
- power supplies for the device, as covered in
|
||||
Documentation/devicetree/bindings/regulator/regulator.txt, depending
|
||||
on compatible:
|
||||
- for wlf,wm1811 and wlf,wm8958:
|
||||
AVDD1-supply, AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply,
|
||||
DCVDD-supply, CPVDD-supply, SPKVDD1-supply, SPKVDD2-supply
|
||||
- for wlf,wm8994:
|
||||
AVDD1-supply, AVDD2-supply, DBVDD-supply, DCVDD-supply, CPVDD-supply,
|
||||
SPKVDD1-supply, SPKVDD2-supply
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupts : The interrupt line the IRQ signal for the device is
|
||||
connected to. This is optional, if it is not connected then none
|
||||
of the interrupt related properties should be specified.
|
||||
- interrupt-controller : These devices contain interrupt controllers
|
||||
and may provide interrupt services to other devices if they have an
|
||||
interrupt line connected.
|
||||
- #interrupt-cells: the number of cells to describe an IRQ, this should be 2.
|
||||
The first cell is the IRQ number.
|
||||
The second cell is the flags, encoded as the trigger masks from
|
||||
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
|
||||
|
||||
- clocks : A list of up to two phandle and clock specifier pairs
|
||||
- clock-names : A list of clock names sorted in the same order as clocks.
|
||||
Valid clock names are "MCLK1" and "MCLK2".
|
||||
|
||||
- wlf,gpio-cfg : A list of GPIO configuration register values. If absent,
|
||||
no configuration of these registers is performed. If any value is
|
||||
over 0xffff then the register will be left as default. If present 11
|
||||
values must be supplied.
|
||||
|
||||
- wlf,micbias-cfg : Two MICBIAS register values for WM1811 or
|
||||
WM8958. If absent the register defaults will be used.
|
||||
|
||||
- wlf,ldo1ena : GPIO specifier for control of LDO1ENA input to device.
|
||||
- wlf,ldo2ena : GPIO specifier for control of LDO2ENA input to device.
|
||||
|
||||
- wlf,lineout1-se : If present LINEOUT1 is in single ended mode.
|
||||
- wlf,lineout2-se : If present LINEOUT2 is in single ended mode.
|
||||
|
||||
- wlf,lineout1-feedback : If present LINEOUT1 has common mode feedback
|
||||
connected.
|
||||
- wlf,lineout2-feedback : If present LINEOUT2 has common mode feedback
|
||||
connected.
|
||||
|
||||
- wlf,ldoena-always-driven : If present LDOENA is always driven.
|
||||
|
||||
- wlf,spkmode-pu : If present enable the internal pull-up resistor on
|
||||
the SPKMODE pin.
|
||||
|
||||
- wlf,csnaddr-pd : If present enable the internal pull-down resistor on
|
||||
the CS/ADDR pin.
|
||||
|
||||
Pins on the device (for linking into audio routes):
|
||||
|
||||
* IN1LN
|
||||
* IN1LP
|
||||
* IN2LN
|
||||
* IN2LP:VXRN
|
||||
* IN1RN
|
||||
* IN1RP
|
||||
* IN2RN
|
||||
* IN2RP:VXRP
|
||||
* SPKOUTLP
|
||||
* SPKOUTLN
|
||||
* SPKOUTRP
|
||||
* SPKOUTRN
|
||||
* HPOUT1L
|
||||
* HPOUT1R
|
||||
* HPOUT2P
|
||||
* HPOUT2N
|
||||
* LINEOUT1P
|
||||
* LINEOUT1N
|
||||
* LINEOUT2P
|
||||
* LINEOUT2N
|
||||
|
||||
Example:
|
||||
|
||||
wm8994: codec@1a {
|
||||
compatible = "wlf,wm8994";
|
||||
reg = <0x1a>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
lineout1-se;
|
||||
|
||||
AVDD1-supply = <®ulator>;
|
||||
AVDD2-supply = <®ulator>;
|
||||
CPVDD-supply = <®ulator>;
|
||||
DBVDD-supply = <®ulator>;
|
||||
DCVDD-supply = <®ulator>;
|
||||
SPKVDD1-supply = <®ulator>;
|
||||
SPKVDD2-supply = <®ulator>;
|
||||
};
|
||||
|
|
@ -723,9 +723,10 @@ Module for EMU10K1/EMU10k2 based PCI sound cards.
|
|||
|
||||
* Sound Blaster Live!
|
||||
* Sound Blaster PCI 512
|
||||
* Emu APS (partially supported)
|
||||
* Sound Blaster Audigy
|
||||
|
||||
* E-MU APS (partially supported)
|
||||
* E-MU DAS
|
||||
|
||||
extin
|
||||
bitmap of available external inputs for FX8010 (see below)
|
||||
extout
|
||||
|
|
|
|||
|
|
@ -19,9 +19,9 @@ Digital mixer controls
|
|||
These controls are built using the DSP instructions. They offer extended
|
||||
functionality. Only the default built-in code in the ALSA driver is described
|
||||
here. Note that the controls work as attenuators: the maximum value is the
|
||||
neutral position leaving the signal unchanged. Note that if the same destination
|
||||
is mentioned in multiple controls, the signal is accumulated and can be wrapped
|
||||
(set to maximal or minimal value without checking of overflow).
|
||||
neutral position leaving the signal unchanged. Note that if the same destination
|
||||
is mentioned in multiple controls, the signal is accumulated and can be clipped
|
||||
(set to maximal or minimal value without checking for overflow).
|
||||
|
||||
|
||||
Explanation of used abbreviations:
|
||||
|
|
@ -32,17 +32,17 @@ ADC
|
|||
analog to digital converter
|
||||
I2S
|
||||
one-way three wire serial bus for digital sound by Philips Semiconductors
|
||||
(this standard is used for connecting standalone DAC and ADC converters)
|
||||
(this standard is used for connecting standalone D/A and A/D converters)
|
||||
LFE
|
||||
low frequency effects (subwoofer signal)
|
||||
low frequency effects (used as subwoofer signal)
|
||||
AC97
|
||||
a chip containing an analog mixer, DAC and ADC converters
|
||||
a chip containing an analog mixer, D/A and A/D converters
|
||||
IEC958
|
||||
S/PDIF
|
||||
FX-bus
|
||||
the EMU10K2 chip has an effect bus containing 64 accumulators.
|
||||
Each of the synthesizer voices can feed its output to these accumulators
|
||||
and the DSP microcontroller can operate with the resulting sum.
|
||||
Each of the synthesizer voices can feed its output to these accumulators
|
||||
and the DSP microcontroller can operate with the resulting sum.
|
||||
|
||||
name='PCM Front Playback Volume',index=0
|
||||
----------------------------------------
|
||||
|
|
@ -218,8 +218,8 @@ LFE outputs.
|
|||
name='IEC958 Optical Raw Playback Switch',index=0
|
||||
-------------------------------------------------
|
||||
If this switch is on, then the samples for the IEC958 (S/PDIF) digital
|
||||
output are taken only from the raw FX8010 PCM, otherwise standard front
|
||||
PCM samples are taken.
|
||||
output are taken only from the raw iec958 ALSA PCM device (which uses
|
||||
accumulators 20 and 21 for left and right PCM by default).
|
||||
|
||||
|
||||
PCM stream related controls
|
||||
|
|
@ -237,8 +237,8 @@ as follows:
|
|||
|
||||
name='EMU10K1 PCM Send Routing',index 0-31
|
||||
------------------------------------------
|
||||
This control specifies the destination - FX-bus accumulators. There 24
|
||||
values with this mapping:
|
||||
This control specifies the destination - FX-bus accumulators. There are 24
|
||||
values in this mapping:
|
||||
|
||||
* 0 - mono, A destination (FX-bus 0-63), default 0
|
||||
* 1 - mono, B destination (FX-bus 0-63), default 1
|
||||
|
|
@ -306,6 +306,9 @@ MANUALS/PATENTS
|
|||
ftp://opensource.creative.com/pub/doc
|
||||
-------------------------------------
|
||||
|
||||
Note that the site is defunct, but the documents are available
|
||||
from various other locations.
|
||||
|
||||
LM4545.pdf
|
||||
AC97 Codec
|
||||
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ The ALSA driver programs this portion of chip by default code
|
|||
IEC958 (S/PDIF) raw PCM
|
||||
=======================
|
||||
|
||||
This PCM device (it's the 4th PCM device (index 3!) and first subdevice
|
||||
This PCM device (it's the 3rd PCM device (index 2!) and first subdevice
|
||||
(index 0) for a given card) allows to forward 48kHz, stereo, 16-bit
|
||||
little endian streams without any modifications to the digital output
|
||||
(coaxial or optical). The universal interface allows the creation of up
|
||||
|
|
@ -33,9 +33,9 @@ Digital mixer controls
|
|||
These controls are built using the DSP instructions. They offer extended
|
||||
functionality. Only the default built-in code in the ALSA driver is described
|
||||
here. Note that the controls work as attenuators: the maximum value is the
|
||||
neutral position leaving the signal unchanged. Note that if the same destination
|
||||
is mentioned in multiple controls, the signal is accumulated and can be wrapped
|
||||
(set to maximal or minimal value without checking of overflow).
|
||||
neutral position leaving the signal unchanged. Note that if the same destination
|
||||
is mentioned in multiple controls, the signal is accumulated and can be clipped
|
||||
(set to maximal or minimal value without checking for overflow).
|
||||
|
||||
|
||||
Explanation of used abbreviations:
|
||||
|
|
@ -46,11 +46,11 @@ ADC
|
|||
analog to digital converter
|
||||
I2S
|
||||
one-way three wire serial bus for digital sound by Philips Semiconductors
|
||||
(this standard is used for connecting standalone DAC and ADC converters)
|
||||
(this standard is used for connecting standalone D/A and A/D converters)
|
||||
LFE
|
||||
low frequency effects (subwoofer signal)
|
||||
low frequency effects (used as subwoofer signal)
|
||||
AC97
|
||||
a chip containing an analog mixer, DAC and ADC converters
|
||||
a chip containing an analog mixer, D/A and A/D converters
|
||||
IEC958
|
||||
S/PDIF
|
||||
FX-bus
|
||||
|
|
@ -313,6 +313,9 @@ MANUALS/PATENTS
|
|||
ftp://opensource.creative.com/pub/doc
|
||||
-------------------------------------
|
||||
|
||||
Note that the site is defunct, but the documents are available
|
||||
from various other locations.
|
||||
|
||||
LM4545.pdf
|
||||
AC97 Codec
|
||||
m2049.pdf
|
||||
|
|
|
|||
|
|
@ -9,3 +9,4 @@ HD-Audio
|
|||
controls
|
||||
dp-mst
|
||||
realtek-pc-beep
|
||||
intel-multi-link
|
||||
|
|
|
|||
|
|
@ -0,0 +1,312 @@
|
|||
.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
|
||||
.. include:: <isonum.txt>
|
||||
|
||||
================================================
|
||||
HDAudio multi-link extensions on Intel platforms
|
||||
================================================
|
||||
|
||||
:Copyright: |copy| 2023 Intel Corporation
|
||||
|
||||
This file documents the 'multi-link structure' introduced in 2015 with
|
||||
the Skylake processor and recently extended in newer Intel platforms
|
||||
|
||||
HDaudio existing link mapping (2015 addition in SkyLake)
|
||||
========================================================
|
||||
|
||||
External HDAudio codecs are handled with link #0, while iDISP codec
|
||||
for HDMI/DisplayPort is handled with link #1.
|
||||
|
||||
The only change to the 2015 definitions is the declaration of the
|
||||
LCAP.ALT=0x0 - since the ALT bit was previously reserved, this is a
|
||||
backwards-compatible change.
|
||||
|
||||
LCTL.SPA and LCTL.CPA are automatically set when exiting reset. They
|
||||
are only used in existing drivers when the SCF value needs to be
|
||||
corrected.
|
||||
|
||||
Basic structure for HDaudio codecs
|
||||
----------------------------------
|
||||
|
||||
::
|
||||
|
||||
+-----------+
|
||||
| ML cap #0 |
|
||||
+-----------+
|
||||
| ML cap #1 |---+
|
||||
+-----------+ |
|
||||
|
|
||||
+--> 0x0 +---------------+ LCAP
|
||||
| ALT=0 |
|
||||
+---------------+
|
||||
| S192 |
|
||||
+---------------+
|
||||
| S96 |
|
||||
+---------------+
|
||||
| S48 |
|
||||
+---------------+
|
||||
| S24 |
|
||||
+---------------+
|
||||
| S12 |
|
||||
+---------------+
|
||||
| S6 |
|
||||
+---------------+
|
||||
|
||||
0x4 +---------------+ LCTL
|
||||
| INTSTS |
|
||||
+---------------+
|
||||
| CPA |
|
||||
+---------------+
|
||||
| SPA |
|
||||
+---------------+
|
||||
| SCF |
|
||||
+---------------+
|
||||
|
||||
0x8 +---------------+ LOSIDV
|
||||
| L1OSIVD15 |
|
||||
+---------------+
|
||||
| L1OSIDV.. |
|
||||
+---------------+
|
||||
| L1OSIDV1 |
|
||||
+---------------+
|
||||
|
||||
0xC +---------------+ LSDIID
|
||||
| SDIID14 |
|
||||
+---------------+
|
||||
| SDIID... |
|
||||
+---------------+
|
||||
| SDIID0 |
|
||||
+---------------+
|
||||
|
||||
SoundWire HDaudio extended link mapping
|
||||
=======================================
|
||||
|
||||
A SoundWire extended link is identified when LCAP.ALT=1 and
|
||||
LEPTR.ID=0.
|
||||
|
||||
DMA control uses the existing LOSIDV register.
|
||||
|
||||
Changes include additional descriptions for enumeration that were not
|
||||
present in earlier generations.
|
||||
|
||||
- multi-link synchronization: capabilities in LCAP.LSS and control in LSYNC
|
||||
- number of sublinks (manager IP) in LCAP.LSCOUNT
|
||||
- power management moved from SHIM to LCTL.SPA bits
|
||||
- hand-over to the DSP for access to multi-link registers, SHIM/IP with LCTL.OFLEN
|
||||
- mapping of SoundWire codecs to SDI ID bits
|
||||
- move of SHIM and Cadence registers to different offsets, with no
|
||||
change in functionality. The LEPTR.PTR value is an offset from the
|
||||
ML address, with a default value of 0x30000.
|
||||
|
||||
Extended structure for SoundWire (assuming 4 Manager IP)
|
||||
--------------------------------------------------------
|
||||
|
||||
::
|
||||
|
||||
+-----------+
|
||||
| ML cap #0 |
|
||||
+-----------+
|
||||
| ML cap #1 |
|
||||
+-----------+
|
||||
| ML cap #2 |---+
|
||||
+-----------+ |
|
||||
|
|
||||
+--> 0x0 +---------------+ LCAP
|
||||
| ALT=1 |
|
||||
+---------------+
|
||||
| INTC |
|
||||
+---------------+
|
||||
| OFLS |
|
||||
+---------------+
|
||||
| LSS |
|
||||
+---------------+
|
||||
| SLCOUNT=4 |-----------+
|
||||
+---------------+ |
|
||||
|
|
||||
0x4 +---------------+ LCTL |
|
||||
| INTSTS | |
|
||||
+---------------+ |
|
||||
| CPA (x bits) | |
|
||||
+---------------+ |
|
||||
| SPA (x bits) | |
|
||||
+---------------+ for each sublink x
|
||||
| INTEN | |
|
||||
+---------------+ |
|
||||
| OFLEN | |
|
||||
+---------------+ |
|
||||
|
|
||||
0x8 +---------------+ LOSIDV |
|
||||
| L1OSIVD15 | |
|
||||
+---------------+ |
|
||||
| L1OSIDV.. | |
|
||||
+---------------+ |
|
||||
| L1OSIDV1 | +---+----------------------------------------------------------+
|
||||
+---------------+ | |
|
||||
v |
|
||||
0xC + 0x2 * x +---------------+ LSDIIDx +---> 0x30000 +-----------------+ 0x00030000 |
|
||||
| SDIID14 | | | SoundWire SHIM | |
|
||||
+---------------+ | | generic | |
|
||||
| SDIID... | | +-----------------+ 0x00030100 |
|
||||
+---------------+ | | SoundWire IP | |
|
||||
| SDIID0 | | +-----------------+ 0x00036000 |
|
||||
+---------------+ | | SoundWire SHIM | |
|
||||
| | vendor-specific | |
|
||||
0x1C +---------------+ LSYNC | +-----------------+ |
|
||||
| CMDSYNC | | v
|
||||
+---------------+ | +-----------------+ 0x00030000 + 0x8000 * x
|
||||
| SYNCGO | | | SoundWire SHIM |
|
||||
+---------------+ | | generic |
|
||||
| SYNCPU | | +-----------------+ 0x00030100 + 0x8000 * x
|
||||
+---------------+ | | SoundWire IP |
|
||||
| SYNPRD | | +-----------------+ 0x00036000 + 0x8000 * x
|
||||
+---------------+ | | SoundWire SHIM |
|
||||
| | vendor-specific |
|
||||
0x20 +---------------+ LEPTR | +-----------------+
|
||||
| ID = 0 | |
|
||||
+---------------+ |
|
||||
| VER | |
|
||||
+---------------+ |
|
||||
| PTR |------------+
|
||||
+---------------+
|
||||
|
||||
|
||||
DMIC HDaudio extended link mapping
|
||||
==================================
|
||||
|
||||
A DMIC extended link is identified when LCAP.ALT=1 and
|
||||
LEPTR.ID=0xC1 are set.
|
||||
|
||||
DMA control uses the existing LOSIDV register
|
||||
|
||||
Changes include additional descriptions for enumeration that were not
|
||||
present in earlier generations.
|
||||
|
||||
- multi-link synchronization: capabilities in LCAP.LSS and control in LSYNC
|
||||
- power management with LCTL.SPA bits
|
||||
- hand-over to the DSP for access to multi-link registers, SHIM/IP with LCTL.OFLEN
|
||||
|
||||
- move of DMIC registers to different offsets, with no change in
|
||||
functionality. The LEPTR.PTR value is an offset from the ML
|
||||
address, with a default value of 0x10000.
|
||||
|
||||
Extended structure for DMIC
|
||||
---------------------------
|
||||
|
||||
::
|
||||
|
||||
+-----------+
|
||||
| ML cap #0 |
|
||||
+-----------+
|
||||
| ML cap #1 |
|
||||
+-----------+
|
||||
| ML cap #2 |---+
|
||||
+-----------+ |
|
||||
|
|
||||
+--> 0x0 +---------------+ LCAP
|
||||
| ALT=1 |
|
||||
+---------------+
|
||||
| INTC |
|
||||
+---------------+
|
||||
| OFLS |
|
||||
+---------------+
|
||||
| SLCOUNT=1 |
|
||||
+---------------+
|
||||
|
||||
0x4 +---------------+ LCTL
|
||||
| INTSTS |
|
||||
+---------------+
|
||||
| CPA |
|
||||
+---------------+
|
||||
| SPA |
|
||||
+---------------+
|
||||
| INTEN |
|
||||
+---------------+
|
||||
| OFLEN |
|
||||
+---------------+ +---> 0x10000 +-----------------+ 0x00010000
|
||||
| | DMIC SHIM |
|
||||
0x8 +---------------+ LOSIDV | | generic |
|
||||
| L1OSIVD15 | | +-----------------+ 0x00010100
|
||||
+---------------+ | | DMIC IP |
|
||||
| L1OSIDV.. | | +-----------------+ 0x00016000
|
||||
+---------------+ | | DMIC SHIM |
|
||||
| L1OSIDV1 | | | vendor-specific |
|
||||
+---------------+ | +-----------------+
|
||||
|
|
||||
0x20 +---------------+ LEPTR |
|
||||
| ID = 0xC1 | |
|
||||
+---------------+ |
|
||||
| VER | |
|
||||
+---------------+ |
|
||||
| PTR |-----------+
|
||||
+---------------+
|
||||
|
||||
|
||||
SSP HDaudio extended link mapping
|
||||
=================================
|
||||
|
||||
A DMIC extended link is identified when LCAP.ALT=1 and
|
||||
LEPTR.ID=0xC0 are set.
|
||||
|
||||
DMA control uses the existing LOSIDV register
|
||||
|
||||
Changes include additional descriptions for enumeration and control that were not
|
||||
present in earlier generations:
|
||||
- number of sublinks (SSP IP instances) in LCAP.LSCOUNT
|
||||
- power management moved from SHIM to LCTL.SPA bits
|
||||
- hand-over to the DSP for access to multi-link registers, SHIM/IP
|
||||
with LCTL.OFLEN
|
||||
- move of SHIM and SSP IP registers to different offsets, with no
|
||||
change in functionality. The LEPTR.PTR value is an offset from the ML
|
||||
address, with a default value of 0x28000.
|
||||
|
||||
Extended structure for SSP (assuming 3 instances of the IP)
|
||||
-----------------------------------------------------------
|
||||
|
||||
::
|
||||
|
||||
+-----------+
|
||||
| ML cap #0 |
|
||||
+-----------+
|
||||
| ML cap #1 |
|
||||
+-----------+
|
||||
| ML cap #2 |---+
|
||||
+-----------+ |
|
||||
|
|
||||
+--> 0x0 +---------------+ LCAP
|
||||
| ALT=1 |
|
||||
+---------------+
|
||||
| INTC |
|
||||
+---------------+
|
||||
| OFLS |
|
||||
+---------------+
|
||||
| SLCOUNT=3 |-------------------------for each sublink x -------------------------+
|
||||
+---------------+ |
|
||||
|
|
||||
0x4 +---------------+ LCTL |
|
||||
| INTSTS | |
|
||||
+---------------+ |
|
||||
| CPA (x bits) | |
|
||||
+---------------+ |
|
||||
| SPA (x bits) | |
|
||||
+---------------+ |
|
||||
| INTEN | |
|
||||
+---------------+ |
|
||||
| OFLEN | |
|
||||
+---------------+ +---> 0x28000 +-----------------+ 0x00028000 |
|
||||
| | SSP SHIM | |
|
||||
0x8 +---------------+ LOSIDV | | generic | |
|
||||
| L1OSIVD15 | | +-----------------+ 0x00028100 |
|
||||
+---------------+ | | SSP IP | |
|
||||
| L1OSIDV.. | | +-----------------+ 0x00028C00 |
|
||||
+---------------+ | | SSP SHIM | |
|
||||
| L1OSIDV1 | | | vendor-specific | |
|
||||
+---------------+ | +-----------------+ |
|
||||
| v
|
||||
0x20 +---------------+ LEPTR | +-----------------+ 0x00028000 + 0x1000 * x
|
||||
| ID = 0xC0 | | | SSP SHIM |
|
||||
+---------------+ | | generic |
|
||||
| VER | | +-----------------+ 0x00028100 + 0x1000 * x
|
||||
+---------------+ | | SSP IP |
|
||||
| PTR |-----------+ +-----------------+ 0x00028C00 + 0x1000 * x
|
||||
+---------------+ | SSP SHIM |
|
||||
| vendor-specific |
|
||||
+-----------------+
|
||||
File diff suppressed because it is too large
Load Diff
36
MAINTAINERS
36
MAINTAINERS
|
|
@ -2075,6 +2075,7 @@ M: Alexander Sverdlin <alexander.sverdlin@gmail.com>
|
|||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml
|
||||
F: Documentation/devicetree/bindings/sound/cirrus,ep9301-*
|
||||
F: arch/arm/boot/compressed/misc-ep93xx.h
|
||||
F: arch/arm/mach-ep93xx/
|
||||
F: drivers/iio/adc/ep93xx_adc.c
|
||||
|
|
@ -4922,6 +4923,7 @@ L: patches@opensource.cirrus.com
|
|||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/sound/cirrus,cs*
|
||||
F: include/dt-bindings/sound/cs*
|
||||
F: include/sound/cs*
|
||||
F: sound/pci/hda/cs*
|
||||
F: sound/pci/hda/hda_cs_dsp_ctl.*
|
||||
F: sound/soc/codecs/cs*
|
||||
|
|
@ -8282,6 +8284,23 @@ S: Maintained
|
|||
F: drivers/soc/fsl/qe/
|
||||
F: include/soc/fsl/qe/
|
||||
|
||||
FREESCALE QUICC ENGINE QMC DRIVER
|
||||
M: Herve Codina <herve.codina@bootlin.com>
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml
|
||||
F: drivers/soc/fsl/qe/qmc.c
|
||||
F: include/soc/fsl/qe/qmc.h
|
||||
|
||||
FREESCALE QUICC ENGINE TSA DRIVER
|
||||
M: Herve Codina <herve.codina@bootlin.com>
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml
|
||||
F: drivers/soc/fsl/qe/tsa.c
|
||||
F: drivers/soc/fsl/qe/tsa.h
|
||||
F: include/dt-bindings/soc/cpm1-fsl,tsa.h
|
||||
|
||||
FREESCALE QUICC ENGINE UCC ETHERNET DRIVER
|
||||
M: Li Yang <leoyang.li@nxp.com>
|
||||
L: netdev@vger.kernel.org
|
||||
|
|
@ -8333,6 +8352,14 @@ F: sound/soc/fsl/fsl*
|
|||
F: sound/soc/fsl/imx*
|
||||
F: sound/soc/fsl/mpc8610_hpcd.c
|
||||
|
||||
FREESCALE SOC SOUND QMC DRIVER
|
||||
M: Herve Codina <herve.codina@bootlin.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml
|
||||
F: sound/soc/fsl/fsl_qmc_audio.c
|
||||
|
||||
FREESCALE USB PERIPHERAL DRIVERS
|
||||
M: Li Yang <leoyang.li@nxp.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
|
|
@ -13651,9 +13678,13 @@ F: Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
|
|||
F: drivers/spi/spi-at91-usart.c
|
||||
|
||||
MICROCHIP AUDIO ASOC DRIVERS
|
||||
M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/sound/atmel*
|
||||
F: Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt
|
||||
F: Documentation/devicetree/bindings/sound/microchip,sama7g5-*
|
||||
F: Documentation/devicetree/bindings/sound/mikroe,mikroe-proto.txt
|
||||
F: sound/soc/atmel
|
||||
|
||||
MICROCHIP CSI2DC DRIVER
|
||||
|
|
@ -13826,9 +13857,10 @@ S: Supported
|
|||
F: drivers/spi/spi-atmel.*
|
||||
|
||||
MICROCHIP SSC DRIVER
|
||||
M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/misc/atmel-ssc.txt
|
||||
F: drivers/misc/atmel-ssc.c
|
||||
F: include/linux/atmel-ssc.h
|
||||
|
||||
|
|
|
|||
|
|
@ -94,7 +94,7 @@ int cpm_command(u32 command, u8 opcode)
|
|||
int i, ret;
|
||||
unsigned long flags;
|
||||
|
||||
if (command & 0xffffff0f)
|
||||
if (command & 0xffffff03)
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&cmd_lock, flags);
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/delay.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/moduleparam.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
||||
|
|
@ -301,6 +302,7 @@ struct cs_dsp_ops {
|
|||
static const struct cs_dsp_ops cs_dsp_adsp1_ops;
|
||||
static const struct cs_dsp_ops cs_dsp_adsp2_ops[];
|
||||
static const struct cs_dsp_ops cs_dsp_halo_ops;
|
||||
static const struct cs_dsp_ops cs_dsp_halo_ao_ops;
|
||||
|
||||
struct cs_dsp_buf {
|
||||
struct list_head list;
|
||||
|
|
@ -456,6 +458,33 @@ static const struct {
|
|||
},
|
||||
};
|
||||
|
||||
static int cs_dsp_coeff_base_reg(struct cs_dsp_coeff_ctl *ctl, unsigned int *reg,
|
||||
unsigned int off);
|
||||
|
||||
static int cs_dsp_debugfs_read_controls_show(struct seq_file *s, void *ignored)
|
||||
{
|
||||
struct cs_dsp *dsp = s->private;
|
||||
struct cs_dsp_coeff_ctl *ctl;
|
||||
unsigned int reg;
|
||||
|
||||
list_for_each_entry(ctl, &dsp->ctl_list, list) {
|
||||
cs_dsp_coeff_base_reg(ctl, ®, 0);
|
||||
seq_printf(s, "%22.*s: %#8zx %s:%08x %#8x %s %#8x %#4x %c%c%c%c %s %s\n",
|
||||
ctl->subname_len, ctl->subname, ctl->len,
|
||||
cs_dsp_mem_region_name(ctl->alg_region.type),
|
||||
ctl->offset, reg, ctl->fw_name, ctl->alg_region.alg, ctl->type,
|
||||
ctl->flags & WMFW_CTL_FLAG_VOLATILE ? 'V' : '-',
|
||||
ctl->flags & WMFW_CTL_FLAG_SYS ? 'S' : '-',
|
||||
ctl->flags & WMFW_CTL_FLAG_READABLE ? 'R' : '-',
|
||||
ctl->flags & WMFW_CTL_FLAG_WRITEABLE ? 'W' : '-',
|
||||
ctl->enabled ? "enabled" : "disabled",
|
||||
ctl->set ? "dirty" : "clean");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
DEFINE_SHOW_ATTRIBUTE(cs_dsp_debugfs_read_controls);
|
||||
|
||||
/**
|
||||
* cs_dsp_init_debugfs() - Create and populate DSP representation in debugfs
|
||||
* @dsp: pointer to DSP structure
|
||||
|
|
@ -478,6 +507,9 @@ void cs_dsp_init_debugfs(struct cs_dsp *dsp, struct dentry *debugfs_root)
|
|||
debugfs_create_file(cs_dsp_debugfs_fops[i].name, 0444, root,
|
||||
dsp, &cs_dsp_debugfs_fops[i].fops);
|
||||
|
||||
debugfs_create_file("controls", 0444, root, dsp,
|
||||
&cs_dsp_debugfs_read_controls_fops);
|
||||
|
||||
dsp->debugfs_root = root;
|
||||
}
|
||||
EXPORT_SYMBOL_NS_GPL(cs_dsp_init_debugfs, FW_CS_DSP);
|
||||
|
|
@ -1300,6 +1332,9 @@ static int cs_dsp_load(struct cs_dsp *dsp, const struct firmware *firmware,
|
|||
int regions = 0;
|
||||
int ret, offset, type;
|
||||
|
||||
if (!firmware)
|
||||
return 0;
|
||||
|
||||
ret = -EINVAL;
|
||||
|
||||
pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
|
||||
|
|
@ -2821,7 +2856,10 @@ EXPORT_SYMBOL_NS_GPL(cs_dsp_adsp2_init, FW_CS_DSP);
|
|||
*/
|
||||
int cs_dsp_halo_init(struct cs_dsp *dsp)
|
||||
{
|
||||
dsp->ops = &cs_dsp_halo_ops;
|
||||
if (dsp->no_core_startstop)
|
||||
dsp->ops = &cs_dsp_halo_ao_ops;
|
||||
else
|
||||
dsp->ops = &cs_dsp_halo_ops;
|
||||
|
||||
return cs_dsp_common_init(dsp);
|
||||
}
|
||||
|
|
@ -3187,6 +3225,14 @@ static const struct cs_dsp_ops cs_dsp_halo_ops = {
|
|||
.stop_core = cs_dsp_halo_stop_core,
|
||||
};
|
||||
|
||||
static const struct cs_dsp_ops cs_dsp_halo_ao_ops = {
|
||||
.parse_sizes = cs_dsp_adsp2_parse_sizes,
|
||||
.validate_version = cs_dsp_halo_validate_version,
|
||||
.setup_algs = cs_dsp_halo_setup_algs,
|
||||
.region_to_reg = cs_dsp_halo_region_to_reg,
|
||||
.show_fw_status = cs_dsp_halo_show_fw_status,
|
||||
};
|
||||
|
||||
/**
|
||||
* cs_dsp_chunk_write() - Format data to a DSP memory chunk
|
||||
* @ch: Pointer to the chunk structure
|
||||
|
|
|
|||
|
|
@ -33,6 +33,29 @@ config UCC
|
|||
bool
|
||||
default y if UCC_FAST || UCC_SLOW
|
||||
|
||||
config CPM_TSA
|
||||
tristate "CPM TSA support"
|
||||
depends on OF && HAS_IOMEM
|
||||
depends on CPM1 || COMPILE_TEST
|
||||
help
|
||||
Freescale CPM Time Slot Assigner (TSA)
|
||||
controller.
|
||||
|
||||
This option enables support for this
|
||||
controller
|
||||
|
||||
config CPM_QMC
|
||||
tristate "CPM QMC support"
|
||||
depends on OF && HAS_IOMEM
|
||||
depends on CPM1 || (FSL_SOC && COMPILE_TEST)
|
||||
depends on CPM_TSA
|
||||
help
|
||||
Freescale CPM QUICC Multichannel Controller
|
||||
(QMC)
|
||||
|
||||
This option enables support for this
|
||||
controller
|
||||
|
||||
config QE_TDM
|
||||
bool
|
||||
default y if FSL_UCC_HDLC
|
||||
|
|
|
|||
|
|
@ -4,6 +4,8 @@
|
|||
#
|
||||
obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_common.o qe_ic.o qe_io.o
|
||||
obj-$(CONFIG_CPM) += qe_common.o
|
||||
obj-$(CONFIG_CPM_TSA) += tsa.o
|
||||
obj-$(CONFIG_CPM_QMC) += qmc.o
|
||||
obj-$(CONFIG_UCC) += ucc.o
|
||||
obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
|
||||
obj-$(CONFIG_UCC_FAST) += ucc_fast.o
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,846 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* TSA driver
|
||||
*
|
||||
* Copyright 2022 CS GROUP France
|
||||
*
|
||||
* Author: Herve Codina <herve.codina@bootlin.com>
|
||||
*/
|
||||
|
||||
#include "tsa.h"
|
||||
#include <dt-bindings/soc/cpm1-fsl,tsa.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
|
||||
/* TSA SI RAM routing tables entry */
|
||||
#define TSA_SIRAM_ENTRY_LAST (1 << 16)
|
||||
#define TSA_SIRAM_ENTRY_BYTE (1 << 17)
|
||||
#define TSA_SIRAM_ENTRY_CNT(x) (((x) & 0x0f) << 18)
|
||||
#define TSA_SIRAM_ENTRY_CSEL_MASK (0x7 << 22)
|
||||
#define TSA_SIRAM_ENTRY_CSEL_NU (0x0 << 22)
|
||||
#define TSA_SIRAM_ENTRY_CSEL_SCC2 (0x2 << 22)
|
||||
#define TSA_SIRAM_ENTRY_CSEL_SCC3 (0x3 << 22)
|
||||
#define TSA_SIRAM_ENTRY_CSEL_SCC4 (0x4 << 22)
|
||||
#define TSA_SIRAM_ENTRY_CSEL_SMC1 (0x5 << 22)
|
||||
#define TSA_SIRAM_ENTRY_CSEL_SMC2 (0x6 << 22)
|
||||
|
||||
/* SI mode register (32 bits) */
|
||||
#define TSA_SIMODE 0x00
|
||||
#define TSA_SIMODE_SMC2 0x80000000
|
||||
#define TSA_SIMODE_SMC1 0x00008000
|
||||
#define TSA_SIMODE_TDMA(x) ((x) << 0)
|
||||
#define TSA_SIMODE_TDMB(x) ((x) << 16)
|
||||
#define TSA_SIMODE_TDM_MASK 0x0fff
|
||||
#define TSA_SIMODE_TDM_SDM_MASK 0x0c00
|
||||
#define TSA_SIMODE_TDM_SDM_NORM 0x0000
|
||||
#define TSA_SIMODE_TDM_SDM_ECHO 0x0400
|
||||
#define TSA_SIMODE_TDM_SDM_INTL_LOOP 0x0800
|
||||
#define TSA_SIMODE_TDM_SDM_LOOP_CTRL 0x0c00
|
||||
#define TSA_SIMODE_TDM_RFSD(x) ((x) << 8)
|
||||
#define TSA_SIMODE_TDM_DSC 0x0080
|
||||
#define TSA_SIMODE_TDM_CRT 0x0040
|
||||
#define TSA_SIMODE_TDM_STZ 0x0020
|
||||
#define TSA_SIMODE_TDM_CE 0x0010
|
||||
#define TSA_SIMODE_TDM_FE 0x0008
|
||||
#define TSA_SIMODE_TDM_GM 0x0004
|
||||
#define TSA_SIMODE_TDM_TFSD(x) ((x) << 0)
|
||||
|
||||
/* SI global mode register (8 bits) */
|
||||
#define TSA_SIGMR 0x04
|
||||
#define TSA_SIGMR_ENB (1<<3)
|
||||
#define TSA_SIGMR_ENA (1<<2)
|
||||
#define TSA_SIGMR_RDM_MASK 0x03
|
||||
#define TSA_SIGMR_RDM_STATIC_TDMA 0x00
|
||||
#define TSA_SIGMR_RDM_DYN_TDMA 0x01
|
||||
#define TSA_SIGMR_RDM_STATIC_TDMAB 0x02
|
||||
#define TSA_SIGMR_RDM_DYN_TDMAB 0x03
|
||||
|
||||
/* SI status register (8 bits) */
|
||||
#define TSA_SISTR 0x06
|
||||
|
||||
/* SI command register (8 bits) */
|
||||
#define TSA_SICMR 0x07
|
||||
|
||||
/* SI clock route register (32 bits) */
|
||||
#define TSA_SICR 0x0C
|
||||
#define TSA_SICR_SCC2(x) ((x) << 8)
|
||||
#define TSA_SICR_SCC3(x) ((x) << 16)
|
||||
#define TSA_SICR_SCC4(x) ((x) << 24)
|
||||
#define TSA_SICR_SCC_MASK 0x0ff
|
||||
#define TSA_SICR_SCC_GRX (1 << 7)
|
||||
#define TSA_SICR_SCC_SCX_TSA (1 << 6)
|
||||
#define TSA_SICR_SCC_RXCS_MASK (0x7 << 3)
|
||||
#define TSA_SICR_SCC_RXCS_BRG1 (0x0 << 3)
|
||||
#define TSA_SICR_SCC_RXCS_BRG2 (0x1 << 3)
|
||||
#define TSA_SICR_SCC_RXCS_BRG3 (0x2 << 3)
|
||||
#define TSA_SICR_SCC_RXCS_BRG4 (0x3 << 3)
|
||||
#define TSA_SICR_SCC_RXCS_CLK15 (0x4 << 3)
|
||||
#define TSA_SICR_SCC_RXCS_CLK26 (0x5 << 3)
|
||||
#define TSA_SICR_SCC_RXCS_CLK37 (0x6 << 3)
|
||||
#define TSA_SICR_SCC_RXCS_CLK48 (0x7 << 3)
|
||||
#define TSA_SICR_SCC_TXCS_MASK (0x7 << 0)
|
||||
#define TSA_SICR_SCC_TXCS_BRG1 (0x0 << 0)
|
||||
#define TSA_SICR_SCC_TXCS_BRG2 (0x1 << 0)
|
||||
#define TSA_SICR_SCC_TXCS_BRG3 (0x2 << 0)
|
||||
#define TSA_SICR_SCC_TXCS_BRG4 (0x3 << 0)
|
||||
#define TSA_SICR_SCC_TXCS_CLK15 (0x4 << 0)
|
||||
#define TSA_SICR_SCC_TXCS_CLK26 (0x5 << 0)
|
||||
#define TSA_SICR_SCC_TXCS_CLK37 (0x6 << 0)
|
||||
#define TSA_SICR_SCC_TXCS_CLK48 (0x7 << 0)
|
||||
|
||||
/* Serial interface RAM pointer register (32 bits) */
|
||||
#define TSA_SIRP 0x10
|
||||
|
||||
struct tsa_entries_area {
|
||||
void *__iomem entries_start;
|
||||
void *__iomem entries_next;
|
||||
void *__iomem last_entry;
|
||||
};
|
||||
|
||||
struct tsa_tdm {
|
||||
bool is_enable;
|
||||
struct clk *l1rclk_clk;
|
||||
struct clk *l1rsync_clk;
|
||||
struct clk *l1tclk_clk;
|
||||
struct clk *l1tsync_clk;
|
||||
u32 simode_tdm;
|
||||
};
|
||||
|
||||
#define TSA_TDMA 0
|
||||
#define TSA_TDMB 1
|
||||
|
||||
struct tsa {
|
||||
struct device *dev;
|
||||
void *__iomem si_regs;
|
||||
void *__iomem si_ram;
|
||||
resource_size_t si_ram_sz;
|
||||
spinlock_t lock;
|
||||
int tdms; /* TSA_TDMx ORed */
|
||||
struct tsa_tdm tdm[2]; /* TDMa and TDMb */
|
||||
struct tsa_serial {
|
||||
unsigned int id;
|
||||
struct tsa_serial_info info;
|
||||
} serials[6];
|
||||
};
|
||||
|
||||
static inline struct tsa *tsa_serial_get_tsa(struct tsa_serial *tsa_serial)
|
||||
{
|
||||
/* The serials table is indexed by the serial id */
|
||||
return container_of(tsa_serial, struct tsa, serials[tsa_serial->id]);
|
||||
}
|
||||
|
||||
static inline void tsa_write32(void *__iomem addr, u32 val)
|
||||
{
|
||||
iowrite32be(val, addr);
|
||||
}
|
||||
|
||||
static inline void tsa_write8(void *__iomem addr, u32 val)
|
||||
{
|
||||
iowrite8(val, addr);
|
||||
}
|
||||
|
||||
static inline u32 tsa_read32(void *__iomem addr)
|
||||
{
|
||||
return ioread32be(addr);
|
||||
}
|
||||
|
||||
static inline void tsa_clrbits32(void *__iomem addr, u32 clr)
|
||||
{
|
||||
tsa_write32(addr, tsa_read32(addr) & ~clr);
|
||||
}
|
||||
|
||||
static inline void tsa_clrsetbits32(void *__iomem addr, u32 clr, u32 set)
|
||||
{
|
||||
tsa_write32(addr, (tsa_read32(addr) & ~clr) | set);
|
||||
}
|
||||
|
||||
int tsa_serial_connect(struct tsa_serial *tsa_serial)
|
||||
{
|
||||
struct tsa *tsa = tsa_serial_get_tsa(tsa_serial);
|
||||
unsigned long flags;
|
||||
u32 clear;
|
||||
u32 set;
|
||||
|
||||
switch (tsa_serial->id) {
|
||||
case FSL_CPM_TSA_SCC2:
|
||||
clear = TSA_SICR_SCC2(TSA_SICR_SCC_MASK);
|
||||
set = TSA_SICR_SCC2(TSA_SICR_SCC_SCX_TSA);
|
||||
break;
|
||||
case FSL_CPM_TSA_SCC3:
|
||||
clear = TSA_SICR_SCC3(TSA_SICR_SCC_MASK);
|
||||
set = TSA_SICR_SCC3(TSA_SICR_SCC_SCX_TSA);
|
||||
break;
|
||||
case FSL_CPM_TSA_SCC4:
|
||||
clear = TSA_SICR_SCC4(TSA_SICR_SCC_MASK);
|
||||
set = TSA_SICR_SCC4(TSA_SICR_SCC_SCX_TSA);
|
||||
break;
|
||||
default:
|
||||
dev_err(tsa->dev, "Unsupported serial id %u\n", tsa_serial->id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&tsa->lock, flags);
|
||||
tsa_clrsetbits32(tsa->si_regs + TSA_SICR, clear, set);
|
||||
spin_unlock_irqrestore(&tsa->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(tsa_serial_connect);
|
||||
|
||||
int tsa_serial_disconnect(struct tsa_serial *tsa_serial)
|
||||
{
|
||||
struct tsa *tsa = tsa_serial_get_tsa(tsa_serial);
|
||||
unsigned long flags;
|
||||
u32 clear;
|
||||
|
||||
switch (tsa_serial->id) {
|
||||
case FSL_CPM_TSA_SCC2:
|
||||
clear = TSA_SICR_SCC2(TSA_SICR_SCC_MASK);
|
||||
break;
|
||||
case FSL_CPM_TSA_SCC3:
|
||||
clear = TSA_SICR_SCC3(TSA_SICR_SCC_MASK);
|
||||
break;
|
||||
case FSL_CPM_TSA_SCC4:
|
||||
clear = TSA_SICR_SCC4(TSA_SICR_SCC_MASK);
|
||||
break;
|
||||
default:
|
||||
dev_err(tsa->dev, "Unsupported serial id %u\n", tsa_serial->id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&tsa->lock, flags);
|
||||
tsa_clrsetbits32(tsa->si_regs + TSA_SICR, clear, 0);
|
||||
spin_unlock_irqrestore(&tsa->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(tsa_serial_disconnect);
|
||||
|
||||
int tsa_serial_get_info(struct tsa_serial *tsa_serial, struct tsa_serial_info *info)
|
||||
{
|
||||
memcpy(info, &tsa_serial->info, sizeof(*info));
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(tsa_serial_get_info);
|
||||
|
||||
static void tsa_init_entries_area(struct tsa *tsa, struct tsa_entries_area *area,
|
||||
u32 tdms, u32 tdm_id, bool is_rx)
|
||||
{
|
||||
resource_size_t quarter;
|
||||
resource_size_t half;
|
||||
|
||||
quarter = tsa->si_ram_sz/4;
|
||||
half = tsa->si_ram_sz/2;
|
||||
|
||||
if (tdms == BIT(TSA_TDMA)) {
|
||||
/* Only TDMA */
|
||||
if (is_rx) {
|
||||
/* First half of si_ram */
|
||||
area->entries_start = tsa->si_ram;
|
||||
area->entries_next = area->entries_start + half;
|
||||
area->last_entry = NULL;
|
||||
} else {
|
||||
/* Second half of si_ram */
|
||||
area->entries_start = tsa->si_ram + half;
|
||||
area->entries_next = area->entries_start + half;
|
||||
area->last_entry = NULL;
|
||||
}
|
||||
} else {
|
||||
/* Only TDMB or both TDMs */
|
||||
if (tdm_id == TSA_TDMA) {
|
||||
if (is_rx) {
|
||||
/* First half of first half of si_ram */
|
||||
area->entries_start = tsa->si_ram;
|
||||
area->entries_next = area->entries_start + quarter;
|
||||
area->last_entry = NULL;
|
||||
} else {
|
||||
/* First half of second half of si_ram */
|
||||
area->entries_start = tsa->si_ram + (2 * quarter);
|
||||
area->entries_next = area->entries_start + quarter;
|
||||
area->last_entry = NULL;
|
||||
}
|
||||
} else {
|
||||
if (is_rx) {
|
||||
/* Second half of first half of si_ram */
|
||||
area->entries_start = tsa->si_ram + quarter;
|
||||
area->entries_next = area->entries_start + quarter;
|
||||
area->last_entry = NULL;
|
||||
} else {
|
||||
/* Second half of second half of si_ram */
|
||||
area->entries_start = tsa->si_ram + (3 * quarter);
|
||||
area->entries_next = area->entries_start + quarter;
|
||||
area->last_entry = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static const char *tsa_serial_id2name(struct tsa *tsa, u32 serial_id)
|
||||
{
|
||||
switch (serial_id) {
|
||||
case FSL_CPM_TSA_NU: return "Not used";
|
||||
case FSL_CPM_TSA_SCC2: return "SCC2";
|
||||
case FSL_CPM_TSA_SCC3: return "SCC3";
|
||||
case FSL_CPM_TSA_SCC4: return "SCC4";
|
||||
case FSL_CPM_TSA_SMC1: return "SMC1";
|
||||
case FSL_CPM_TSA_SMC2: return "SMC2";
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static u32 tsa_serial_id2csel(struct tsa *tsa, u32 serial_id)
|
||||
{
|
||||
switch (serial_id) {
|
||||
case FSL_CPM_TSA_SCC2: return TSA_SIRAM_ENTRY_CSEL_SCC2;
|
||||
case FSL_CPM_TSA_SCC3: return TSA_SIRAM_ENTRY_CSEL_SCC3;
|
||||
case FSL_CPM_TSA_SCC4: return TSA_SIRAM_ENTRY_CSEL_SCC4;
|
||||
case FSL_CPM_TSA_SMC1: return TSA_SIRAM_ENTRY_CSEL_SMC1;
|
||||
case FSL_CPM_TSA_SMC2: return TSA_SIRAM_ENTRY_CSEL_SMC2;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return TSA_SIRAM_ENTRY_CSEL_NU;
|
||||
}
|
||||
|
||||
static int tsa_add_entry(struct tsa *tsa, struct tsa_entries_area *area,
|
||||
u32 count, u32 serial_id)
|
||||
{
|
||||
void *__iomem addr;
|
||||
u32 left;
|
||||
u32 val;
|
||||
u32 cnt;
|
||||
u32 nb;
|
||||
|
||||
addr = area->last_entry ? area->last_entry + 4 : area->entries_start;
|
||||
|
||||
nb = DIV_ROUND_UP(count, 8);
|
||||
if ((addr + (nb * 4)) > area->entries_next) {
|
||||
dev_err(tsa->dev, "si ram area full\n");
|
||||
return -ENOSPC;
|
||||
}
|
||||
|
||||
if (area->last_entry) {
|
||||
/* Clear last flag */
|
||||
tsa_clrbits32(area->last_entry, TSA_SIRAM_ENTRY_LAST);
|
||||
}
|
||||
|
||||
left = count;
|
||||
while (left) {
|
||||
val = TSA_SIRAM_ENTRY_BYTE | tsa_serial_id2csel(tsa, serial_id);
|
||||
|
||||
if (left > 16) {
|
||||
cnt = 16;
|
||||
} else {
|
||||
cnt = left;
|
||||
val |= TSA_SIRAM_ENTRY_LAST;
|
||||
area->last_entry = addr;
|
||||
}
|
||||
val |= TSA_SIRAM_ENTRY_CNT(cnt - 1);
|
||||
|
||||
tsa_write32(addr, val);
|
||||
addr += 4;
|
||||
left -= cnt;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tsa_of_parse_tdm_route(struct tsa *tsa, struct device_node *tdm_np,
|
||||
u32 tdms, u32 tdm_id, bool is_rx)
|
||||
{
|
||||
struct tsa_entries_area area;
|
||||
const char *route_name;
|
||||
u32 serial_id;
|
||||
int len, i;
|
||||
u32 count;
|
||||
const char *serial_name;
|
||||
struct tsa_serial_info *serial_info;
|
||||
struct tsa_tdm *tdm;
|
||||
int ret;
|
||||
u32 ts;
|
||||
|
||||
route_name = is_rx ? "fsl,rx-ts-routes" : "fsl,tx-ts-routes";
|
||||
|
||||
len = of_property_count_u32_elems(tdm_np, route_name);
|
||||
if (len < 0) {
|
||||
dev_err(tsa->dev, "%pOF: failed to read %s\n", tdm_np, route_name);
|
||||
return len;
|
||||
}
|
||||
if (len % 2 != 0) {
|
||||
dev_err(tsa->dev, "%pOF: wrong %s format\n", tdm_np, route_name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
tsa_init_entries_area(tsa, &area, tdms, tdm_id, is_rx);
|
||||
ts = 0;
|
||||
for (i = 0; i < len; i += 2) {
|
||||
of_property_read_u32_index(tdm_np, route_name, i, &count);
|
||||
of_property_read_u32_index(tdm_np, route_name, i + 1, &serial_id);
|
||||
|
||||
if (serial_id >= ARRAY_SIZE(tsa->serials)) {
|
||||
dev_err(tsa->dev, "%pOF: invalid serial id (%u)\n",
|
||||
tdm_np, serial_id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
serial_name = tsa_serial_id2name(tsa, serial_id);
|
||||
if (!serial_name) {
|
||||
dev_err(tsa->dev, "%pOF: unsupported serial id (%u)\n",
|
||||
tdm_np, serial_id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
dev_dbg(tsa->dev, "tdm_id=%u, %s ts %u..%u -> %s\n",
|
||||
tdm_id, route_name, ts, ts+count-1, serial_name);
|
||||
ts += count;
|
||||
|
||||
ret = tsa_add_entry(tsa, &area, count, serial_id);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
serial_info = &tsa->serials[serial_id].info;
|
||||
tdm = &tsa->tdm[tdm_id];
|
||||
if (is_rx) {
|
||||
serial_info->rx_fs_rate = clk_get_rate(tdm->l1rsync_clk);
|
||||
serial_info->rx_bit_rate = clk_get_rate(tdm->l1rclk_clk);
|
||||
serial_info->nb_rx_ts += count;
|
||||
} else {
|
||||
serial_info->tx_fs_rate = tdm->l1tsync_clk ?
|
||||
clk_get_rate(tdm->l1tsync_clk) :
|
||||
clk_get_rate(tdm->l1rsync_clk);
|
||||
serial_info->tx_bit_rate = tdm->l1tclk_clk ?
|
||||
clk_get_rate(tdm->l1tclk_clk) :
|
||||
clk_get_rate(tdm->l1rclk_clk);
|
||||
serial_info->nb_tx_ts += count;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int tsa_of_parse_tdm_rx_route(struct tsa *tsa,
|
||||
struct device_node *tdm_np,
|
||||
u32 tdms, u32 tdm_id)
|
||||
{
|
||||
return tsa_of_parse_tdm_route(tsa, tdm_np, tdms, tdm_id, true);
|
||||
}
|
||||
|
||||
static inline int tsa_of_parse_tdm_tx_route(struct tsa *tsa,
|
||||
struct device_node *tdm_np,
|
||||
u32 tdms, u32 tdm_id)
|
||||
{
|
||||
return tsa_of_parse_tdm_route(tsa, tdm_np, tdms, tdm_id, false);
|
||||
}
|
||||
|
||||
static int tsa_of_parse_tdms(struct tsa *tsa, struct device_node *np)
|
||||
{
|
||||
struct device_node *tdm_np;
|
||||
struct tsa_tdm *tdm;
|
||||
struct clk *clk;
|
||||
u32 tdm_id, val;
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
tsa->tdms = 0;
|
||||
tsa->tdm[0].is_enable = false;
|
||||
tsa->tdm[1].is_enable = false;
|
||||
|
||||
for_each_available_child_of_node(np, tdm_np) {
|
||||
ret = of_property_read_u32(tdm_np, "reg", &tdm_id);
|
||||
if (ret) {
|
||||
dev_err(tsa->dev, "%pOF: failed to read reg\n", tdm_np);
|
||||
of_node_put(tdm_np);
|
||||
return ret;
|
||||
}
|
||||
switch (tdm_id) {
|
||||
case 0:
|
||||
tsa->tdms |= BIT(TSA_TDMA);
|
||||
break;
|
||||
case 1:
|
||||
tsa->tdms |= BIT(TSA_TDMB);
|
||||
break;
|
||||
default:
|
||||
dev_err(tsa->dev, "%pOF: Invalid tdm_id (%u)\n", tdm_np,
|
||||
tdm_id);
|
||||
of_node_put(tdm_np);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
for_each_available_child_of_node(np, tdm_np) {
|
||||
ret = of_property_read_u32(tdm_np, "reg", &tdm_id);
|
||||
if (ret) {
|
||||
dev_err(tsa->dev, "%pOF: failed to read reg\n", tdm_np);
|
||||
of_node_put(tdm_np);
|
||||
return ret;
|
||||
}
|
||||
|
||||
tdm = &tsa->tdm[tdm_id];
|
||||
tdm->simode_tdm = TSA_SIMODE_TDM_SDM_NORM;
|
||||
|
||||
val = 0;
|
||||
ret = of_property_read_u32(tdm_np, "fsl,rx-frame-sync-delay-bits",
|
||||
&val);
|
||||
if (ret && ret != -EINVAL) {
|
||||
dev_err(tsa->dev,
|
||||
"%pOF: failed to read fsl,rx-frame-sync-delay-bits\n",
|
||||
tdm_np);
|
||||
of_node_put(tdm_np);
|
||||
return ret;
|
||||
}
|
||||
if (val > 3) {
|
||||
dev_err(tsa->dev,
|
||||
"%pOF: Invalid fsl,rx-frame-sync-delay-bits (%u)\n",
|
||||
tdm_np, val);
|
||||
of_node_put(tdm_np);
|
||||
return -EINVAL;
|
||||
}
|
||||
tdm->simode_tdm |= TSA_SIMODE_TDM_RFSD(val);
|
||||
|
||||
val = 0;
|
||||
ret = of_property_read_u32(tdm_np, "fsl,tx-frame-sync-delay-bits",
|
||||
&val);
|
||||
if (ret && ret != -EINVAL) {
|
||||
dev_err(tsa->dev,
|
||||
"%pOF: failed to read fsl,tx-frame-sync-delay-bits\n",
|
||||
tdm_np);
|
||||
of_node_put(tdm_np);
|
||||
return ret;
|
||||
}
|
||||
if (val > 3) {
|
||||
dev_err(tsa->dev,
|
||||
"%pOF: Invalid fsl,tx-frame-sync-delay-bits (%u)\n",
|
||||
tdm_np, val);
|
||||
of_node_put(tdm_np);
|
||||
return -EINVAL;
|
||||
}
|
||||
tdm->simode_tdm |= TSA_SIMODE_TDM_TFSD(val);
|
||||
|
||||
if (of_property_read_bool(tdm_np, "fsl,common-rxtx-pins"))
|
||||
tdm->simode_tdm |= TSA_SIMODE_TDM_CRT;
|
||||
|
||||
if (of_property_read_bool(tdm_np, "fsl,clock-falling-edge"))
|
||||
tdm->simode_tdm |= TSA_SIMODE_TDM_CE;
|
||||
|
||||
if (of_property_read_bool(tdm_np, "fsl,fsync-rising-edge"))
|
||||
tdm->simode_tdm |= TSA_SIMODE_TDM_FE;
|
||||
|
||||
if (of_property_read_bool(tdm_np, "fsl,double-speed-clock"))
|
||||
tdm->simode_tdm |= TSA_SIMODE_TDM_DSC;
|
||||
|
||||
clk = of_clk_get_by_name(tdm_np, "l1rsync");
|
||||
if (IS_ERR(clk)) {
|
||||
ret = PTR_ERR(clk);
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
ret = clk_prepare_enable(clk);
|
||||
if (ret) {
|
||||
clk_put(clk);
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
tdm->l1rsync_clk = clk;
|
||||
|
||||
clk = of_clk_get_by_name(tdm_np, "l1rclk");
|
||||
if (IS_ERR(clk)) {
|
||||
ret = PTR_ERR(clk);
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
ret = clk_prepare_enable(clk);
|
||||
if (ret) {
|
||||
clk_put(clk);
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
tdm->l1rclk_clk = clk;
|
||||
|
||||
if (!(tdm->simode_tdm & TSA_SIMODE_TDM_CRT)) {
|
||||
clk = of_clk_get_by_name(tdm_np, "l1tsync");
|
||||
if (IS_ERR(clk)) {
|
||||
ret = PTR_ERR(clk);
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
ret = clk_prepare_enable(clk);
|
||||
if (ret) {
|
||||
clk_put(clk);
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
tdm->l1tsync_clk = clk;
|
||||
|
||||
clk = of_clk_get_by_name(tdm_np, "l1tclk");
|
||||
if (IS_ERR(clk)) {
|
||||
ret = PTR_ERR(clk);
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
ret = clk_prepare_enable(clk);
|
||||
if (ret) {
|
||||
clk_put(clk);
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
tdm->l1tclk_clk = clk;
|
||||
}
|
||||
|
||||
ret = tsa_of_parse_tdm_rx_route(tsa, tdm_np, tsa->tdms, tdm_id);
|
||||
if (ret) {
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = tsa_of_parse_tdm_tx_route(tsa, tdm_np, tsa->tdms, tdm_id);
|
||||
if (ret) {
|
||||
of_node_put(tdm_np);
|
||||
goto err;
|
||||
}
|
||||
|
||||
tdm->is_enable = true;
|
||||
}
|
||||
return 0;
|
||||
|
||||
err:
|
||||
for (i = 0; i < 2; i++) {
|
||||
if (tsa->tdm[i].l1rsync_clk) {
|
||||
clk_disable_unprepare(tsa->tdm[i].l1rsync_clk);
|
||||
clk_put(tsa->tdm[i].l1rsync_clk);
|
||||
}
|
||||
if (tsa->tdm[i].l1rclk_clk) {
|
||||
clk_disable_unprepare(tsa->tdm[i].l1rclk_clk);
|
||||
clk_put(tsa->tdm[i].l1rclk_clk);
|
||||
}
|
||||
if (tsa->tdm[i].l1tsync_clk) {
|
||||
clk_disable_unprepare(tsa->tdm[i].l1rsync_clk);
|
||||
clk_put(tsa->tdm[i].l1rsync_clk);
|
||||
}
|
||||
if (tsa->tdm[i].l1tclk_clk) {
|
||||
clk_disable_unprepare(tsa->tdm[i].l1rclk_clk);
|
||||
clk_put(tsa->tdm[i].l1rclk_clk);
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void tsa_init_si_ram(struct tsa *tsa)
|
||||
{
|
||||
resource_size_t i;
|
||||
|
||||
/* Fill all entries as the last one */
|
||||
for (i = 0; i < tsa->si_ram_sz; i += 4)
|
||||
tsa_write32(tsa->si_ram + i, TSA_SIRAM_ENTRY_LAST);
|
||||
}
|
||||
|
||||
static int tsa_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct resource *res;
|
||||
struct tsa *tsa;
|
||||
unsigned int i;
|
||||
u32 val;
|
||||
int ret;
|
||||
|
||||
tsa = devm_kzalloc(&pdev->dev, sizeof(*tsa), GFP_KERNEL);
|
||||
if (!tsa)
|
||||
return -ENOMEM;
|
||||
|
||||
tsa->dev = &pdev->dev;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(tsa->serials); i++)
|
||||
tsa->serials[i].id = i;
|
||||
|
||||
spin_lock_init(&tsa->lock);
|
||||
|
||||
tsa->si_regs = devm_platform_ioremap_resource_byname(pdev, "si_regs");
|
||||
if (IS_ERR(tsa->si_regs))
|
||||
return PTR_ERR(tsa->si_regs);
|
||||
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "si_ram");
|
||||
if (!res) {
|
||||
dev_err(tsa->dev, "si_ram resource missing\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
tsa->si_ram_sz = resource_size(res);
|
||||
tsa->si_ram = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(tsa->si_ram))
|
||||
return PTR_ERR(tsa->si_ram);
|
||||
|
||||
tsa_init_si_ram(tsa);
|
||||
|
||||
ret = tsa_of_parse_tdms(tsa, np);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Set SIMODE */
|
||||
val = 0;
|
||||
if (tsa->tdm[0].is_enable)
|
||||
val |= TSA_SIMODE_TDMA(tsa->tdm[0].simode_tdm);
|
||||
if (tsa->tdm[1].is_enable)
|
||||
val |= TSA_SIMODE_TDMB(tsa->tdm[1].simode_tdm);
|
||||
|
||||
tsa_clrsetbits32(tsa->si_regs + TSA_SIMODE,
|
||||
TSA_SIMODE_TDMA(TSA_SIMODE_TDM_MASK) |
|
||||
TSA_SIMODE_TDMB(TSA_SIMODE_TDM_MASK),
|
||||
val);
|
||||
|
||||
/* Set SIGMR */
|
||||
val = (tsa->tdms == BIT(TSA_TDMA)) ?
|
||||
TSA_SIGMR_RDM_STATIC_TDMA : TSA_SIGMR_RDM_STATIC_TDMAB;
|
||||
if (tsa->tdms & BIT(TSA_TDMA))
|
||||
val |= TSA_SIGMR_ENA;
|
||||
if (tsa->tdms & BIT(TSA_TDMB))
|
||||
val |= TSA_SIGMR_ENB;
|
||||
tsa_write8(tsa->si_regs + TSA_SIGMR, val);
|
||||
|
||||
platform_set_drvdata(pdev, tsa);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tsa_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct tsa *tsa = platform_get_drvdata(pdev);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
if (tsa->tdm[i].l1rsync_clk) {
|
||||
clk_disable_unprepare(tsa->tdm[i].l1rsync_clk);
|
||||
clk_put(tsa->tdm[i].l1rsync_clk);
|
||||
}
|
||||
if (tsa->tdm[i].l1rclk_clk) {
|
||||
clk_disable_unprepare(tsa->tdm[i].l1rclk_clk);
|
||||
clk_put(tsa->tdm[i].l1rclk_clk);
|
||||
}
|
||||
if (tsa->tdm[i].l1tsync_clk) {
|
||||
clk_disable_unprepare(tsa->tdm[i].l1rsync_clk);
|
||||
clk_put(tsa->tdm[i].l1rsync_clk);
|
||||
}
|
||||
if (tsa->tdm[i].l1tclk_clk) {
|
||||
clk_disable_unprepare(tsa->tdm[i].l1rclk_clk);
|
||||
clk_put(tsa->tdm[i].l1rclk_clk);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id tsa_id_table[] = {
|
||||
{ .compatible = "fsl,cpm1-tsa" },
|
||||
{} /* sentinel */
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, tsa_id_table);
|
||||
|
||||
static struct platform_driver tsa_driver = {
|
||||
.driver = {
|
||||
.name = "fsl-tsa",
|
||||
.of_match_table = of_match_ptr(tsa_id_table),
|
||||
},
|
||||
.probe = tsa_probe,
|
||||
.remove = tsa_remove,
|
||||
};
|
||||
module_platform_driver(tsa_driver);
|
||||
|
||||
struct tsa_serial *tsa_serial_get_byphandle(struct device_node *np,
|
||||
const char *phandle_name)
|
||||
{
|
||||
struct of_phandle_args out_args;
|
||||
struct platform_device *pdev;
|
||||
struct tsa_serial *tsa_serial;
|
||||
struct tsa *tsa;
|
||||
int ret;
|
||||
|
||||
ret = of_parse_phandle_with_fixed_args(np, phandle_name, 1, 0, &out_args);
|
||||
if (ret < 0)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
if (!of_match_node(tsa_driver.driver.of_match_table, out_args.np)) {
|
||||
of_node_put(out_args.np);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
pdev = of_find_device_by_node(out_args.np);
|
||||
of_node_put(out_args.np);
|
||||
if (!pdev)
|
||||
return ERR_PTR(-ENODEV);
|
||||
|
||||
tsa = platform_get_drvdata(pdev);
|
||||
if (!tsa) {
|
||||
platform_device_put(pdev);
|
||||
return ERR_PTR(-EPROBE_DEFER);
|
||||
}
|
||||
|
||||
if (out_args.args_count != 1) {
|
||||
platform_device_put(pdev);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
if (out_args.args[0] >= ARRAY_SIZE(tsa->serials)) {
|
||||
platform_device_put(pdev);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
tsa_serial = &tsa->serials[out_args.args[0]];
|
||||
|
||||
/*
|
||||
* Be sure that the serial id matches the phandle arg.
|
||||
* The tsa_serials table is indexed by serial ids. The serial id is set
|
||||
* during the probe() call and needs to be coherent.
|
||||
*/
|
||||
if (WARN_ON(tsa_serial->id != out_args.args[0])) {
|
||||
platform_device_put(pdev);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
return tsa_serial;
|
||||
}
|
||||
EXPORT_SYMBOL(tsa_serial_get_byphandle);
|
||||
|
||||
void tsa_serial_put(struct tsa_serial *tsa_serial)
|
||||
{
|
||||
struct tsa *tsa = tsa_serial_get_tsa(tsa_serial);
|
||||
|
||||
put_device(tsa->dev);
|
||||
}
|
||||
EXPORT_SYMBOL(tsa_serial_put);
|
||||
|
||||
static void devm_tsa_serial_release(struct device *dev, void *res)
|
||||
{
|
||||
struct tsa_serial **tsa_serial = res;
|
||||
|
||||
tsa_serial_put(*tsa_serial);
|
||||
}
|
||||
|
||||
struct tsa_serial *devm_tsa_serial_get_byphandle(struct device *dev,
|
||||
struct device_node *np,
|
||||
const char *phandle_name)
|
||||
{
|
||||
struct tsa_serial *tsa_serial;
|
||||
struct tsa_serial **dr;
|
||||
|
||||
dr = devres_alloc(devm_tsa_serial_release, sizeof(*dr), GFP_KERNEL);
|
||||
if (!dr)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
tsa_serial = tsa_serial_get_byphandle(np, phandle_name);
|
||||
if (!IS_ERR(tsa_serial)) {
|
||||
*dr = tsa_serial;
|
||||
devres_add(dev, dr);
|
||||
} else {
|
||||
devres_free(dr);
|
||||
}
|
||||
|
||||
return tsa_serial;
|
||||
}
|
||||
EXPORT_SYMBOL(devm_tsa_serial_get_byphandle);
|
||||
|
||||
MODULE_AUTHOR("Herve Codina <herve.codina@bootlin.com>");
|
||||
MODULE_DESCRIPTION("CPM TSA driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -0,0 +1,42 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* TSA management
|
||||
*
|
||||
* Copyright 2022 CS GROUP France
|
||||
*
|
||||
* Author: Herve Codina <herve.codina@bootlin.com>
|
||||
*/
|
||||
#ifndef __SOC_FSL_TSA_H__
|
||||
#define __SOC_FSL_TSA_H__
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
struct device_node;
|
||||
struct device;
|
||||
struct tsa_serial;
|
||||
|
||||
struct tsa_serial *tsa_serial_get_byphandle(struct device_node *np,
|
||||
const char *phandle_name);
|
||||
void tsa_serial_put(struct tsa_serial *tsa_serial);
|
||||
struct tsa_serial *devm_tsa_serial_get_byphandle(struct device *dev,
|
||||
struct device_node *np,
|
||||
const char *phandle_name);
|
||||
|
||||
/* Connect and disconnect the TSA serial */
|
||||
int tsa_serial_connect(struct tsa_serial *tsa_serial);
|
||||
int tsa_serial_disconnect(struct tsa_serial *tsa_serial);
|
||||
|
||||
/* Cell information */
|
||||
struct tsa_serial_info {
|
||||
unsigned long rx_fs_rate;
|
||||
unsigned long rx_bit_rate;
|
||||
u8 nb_rx_ts;
|
||||
unsigned long tx_fs_rate;
|
||||
unsigned long tx_bit_rate;
|
||||
u8 nb_tx_ts;
|
||||
};
|
||||
|
||||
/* Get information */
|
||||
int tsa_serial_get_info(struct tsa_serial *tsa_serial, struct tsa_serial_info *info);
|
||||
|
||||
#endif /* __SOC_FSL_TSA_H__ */
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
|
||||
|
||||
#ifndef __DT_BINDINGS_SOC_FSL_TSA_H
|
||||
#define __DT_BINDINGS_SOC_FSL_TSA_H
|
||||
|
||||
#define FSL_CPM_TSA_NU 0 /* Pseuso Cell Id for not used item */
|
||||
#define FSL_CPM_TSA_SCC2 1
|
||||
#define FSL_CPM_TSA_SCC3 2
|
||||
#define FSL_CPM_TSA_SCC4 3
|
||||
#define FSL_CPM_TSA_SMC1 4
|
||||
#define FSL_CPM_TSA_SMC2 5
|
||||
|
||||
#endif
|
||||
|
|
@ -17,4 +17,61 @@
|
|||
#define CS35L45_ASP_TX_HIZ_UNUSED 0x1
|
||||
#define CS35L45_ASP_TX_HIZ_DISABLED 0x2
|
||||
|
||||
/*
|
||||
* Optional GPIOX Sub-nodes:
|
||||
* The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
|
||||
* sub-nodes for configuring the GPIO pins.
|
||||
*
|
||||
* - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
|
||||
* is 1.
|
||||
* 0 = Output
|
||||
* 1 = Input (Default)
|
||||
*
|
||||
* - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0.
|
||||
*
|
||||
* 0 = Low (Default)
|
||||
* 1 = High
|
||||
*
|
||||
* - gpio-op-cfg : GPIO output configuration. Valid only when 'gpio-ctrl' is 1
|
||||
* and 'gpio-dir' is 0.
|
||||
*
|
||||
* 0 = CMOS (Default)
|
||||
* 1 = Open Drain
|
||||
*
|
||||
* - gpio-pol : GPIO output polarity select. Valid only when 'gpio-ctrl' is 1
|
||||
* and 'gpio-dir' is 0.
|
||||
*
|
||||
* 0 = Non-inverted, Active High (Default)
|
||||
* 1 = Inverted, Active Low
|
||||
*
|
||||
* - gpio-invert : Defines the polarity of the GPIO pin if configured
|
||||
* as input.
|
||||
*
|
||||
* 0 = Not inverted (Default)
|
||||
* 1 = Inverted
|
||||
*
|
||||
* - gpio-ctrl : Defines the function of the GPIO pin.
|
||||
*
|
||||
* GPIO1:
|
||||
* 0 = High impedance input (Default)
|
||||
* 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
|
||||
* 2 = Pin acts as MDSYNC, direction controlled by MDSYNC
|
||||
* 3-7 = Reserved
|
||||
*
|
||||
* GPIO2:
|
||||
* 0 = High impedance input (Default)
|
||||
* 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
|
||||
* 2 = Pin acts as open drain INT
|
||||
* 3 = Reserved
|
||||
* 4 = Pin acts as push-pull output INT. Active low.
|
||||
* 5 = Pin acts as push-pull output INT. Active high.
|
||||
* 6,7 = Reserved
|
||||
*
|
||||
* GPIO3:
|
||||
* 0 = High impedance input (Default)
|
||||
* 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
|
||||
* 2-7 = Reserved
|
||||
*/
|
||||
#define CS35L45_NUM_GPIOS 0x3
|
||||
|
||||
#endif /* DT_CS35L45_H */
|
||||
|
|
|
|||
|
|
@ -156,6 +156,7 @@ struct cs_dsp {
|
|||
unsigned int sysclk_reg;
|
||||
unsigned int sysclk_mask;
|
||||
unsigned int sysclk_shift;
|
||||
bool no_core_startstop;
|
||||
|
||||
struct list_head alg_regions;
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,71 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/*
|
||||
* QMC management
|
||||
*
|
||||
* Copyright 2022 CS GROUP France
|
||||
*
|
||||
* Author: Herve Codina <herve.codina@bootlin.com>
|
||||
*/
|
||||
#ifndef __SOC_FSL_QMC_H__
|
||||
#define __SOC_FSL_QMC_H__
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
struct device_node;
|
||||
struct device;
|
||||
struct qmc_chan;
|
||||
|
||||
struct qmc_chan *qmc_chan_get_byphandle(struct device_node *np, const char *phandle_name);
|
||||
void qmc_chan_put(struct qmc_chan *chan);
|
||||
struct qmc_chan *devm_qmc_chan_get_byphandle(struct device *dev, struct device_node *np,
|
||||
const char *phandle_name);
|
||||
|
||||
enum qmc_mode {
|
||||
QMC_TRANSPARENT,
|
||||
QMC_HDLC,
|
||||
};
|
||||
|
||||
struct qmc_chan_info {
|
||||
enum qmc_mode mode;
|
||||
unsigned long rx_fs_rate;
|
||||
unsigned long rx_bit_rate;
|
||||
u8 nb_rx_ts;
|
||||
unsigned long tx_fs_rate;
|
||||
unsigned long tx_bit_rate;
|
||||
u8 nb_tx_ts;
|
||||
};
|
||||
|
||||
int qmc_chan_get_info(struct qmc_chan *chan, struct qmc_chan_info *info);
|
||||
|
||||
struct qmc_chan_param {
|
||||
enum qmc_mode mode;
|
||||
union {
|
||||
struct {
|
||||
u16 max_rx_buf_size;
|
||||
u16 max_rx_frame_size;
|
||||
bool is_crc32;
|
||||
} hdlc;
|
||||
struct {
|
||||
u16 max_rx_buf_size;
|
||||
} transp;
|
||||
};
|
||||
};
|
||||
|
||||
int qmc_chan_set_param(struct qmc_chan *chan, const struct qmc_chan_param *param);
|
||||
|
||||
int qmc_chan_write_submit(struct qmc_chan *chan, dma_addr_t addr, size_t length,
|
||||
void (*complete)(void *context), void *context);
|
||||
|
||||
int qmc_chan_read_submit(struct qmc_chan *chan, dma_addr_t addr, size_t length,
|
||||
void (*complete)(void *context, size_t length),
|
||||
void *context);
|
||||
|
||||
#define QMC_CHAN_READ (1<<0)
|
||||
#define QMC_CHAN_WRITE (1<<1)
|
||||
#define QMC_CHAN_ALL (QMC_CHAN_READ | QMC_CHAN_WRITE)
|
||||
|
||||
int qmc_chan_start(struct qmc_chan *chan, int direction);
|
||||
int qmc_chan_stop(struct qmc_chan *chan, int direction);
|
||||
int qmc_chan_reset(struct qmc_chan *chan, int direction);
|
||||
|
||||
#endif /* __SOC_FSL_QMC_H__ */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue