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mtd: nand: add the "bits per cell" info for legacy ID NAND
The legacy ID NAND are all SLC. This patch sets 1 to the @bits_per_cell for the legacy ID NAND, which means they are all SLC. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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@ -3238,6 +3238,9 @@ static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip,
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mtd->oobsize = mtd->writesize / 32;
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mtd->oobsize = mtd->writesize / 32;
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*busw = type->options & NAND_BUSWIDTH_16;
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*busw = type->options & NAND_BUSWIDTH_16;
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/* All legacy ID NAND are small-page, SLC */
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chip->bits_per_cell = 1;
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/*
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/*
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* Check for Spansion/AMD ID + repeating 5th, 6th byte since
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* Check for Spansion/AMD ID + repeating 5th, 6th byte since
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* some Spansion chips have erasesize that conflicts with size
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* some Spansion chips have erasesize that conflicts with size
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