mirrors
/
linux-stable
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Boundary condition fixes for bugs unearthed by the perf fuzzer. 

Signed-off-by: Ingo Molnar <mingo@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAmBXJeQRHG1pbmdvQGtl
 cm5lbC5vcmcACgkQEnMQ0APhK1iE/BAAsawZZH9GFsnwv7HraBl0jKvftp3/xPh6
 WL/RKGhGfu3f9MOrcM+dflggJEfnvz6/Tfm7/XKWHlIW3nHrQcn+lQtddoTwb2wp
 CmpAUYGtGWr7tr/B5vQcIg+yyYsVGtfyEmVro+TfzYCl/e21zATqEKtgSGclCcXg
 g0u5ZJsL8AOPSk2cR/ABrpI0MUlKHjUSJJ3V9j69OqSLhfc+GCn6ifTC1XK05MyR
 JX1kNaVTpVSGk650+oCUOP2rNaSk/G2wVZtp/LB9O1N0b9Zot2hQYbx1cEGFRNOy
 Q2FeMcw3V2t26Xk2q9AFGlOS0IeasO/NKK/urotRS2/rXdcr8QMUHTZdmr85UVQJ
 oohM+/DqoCAY5TeC4+d+tL5i+DLVGkrdbHX8IKkzYmejhE9DMQ5+a16O7ZcGoVv4
 oFG8RYHsUHPjEqPgC9vxS8Iy3n2yk34TIKQg/DJBdNhkQPnNup/zAInCEs6WqWN7
 OZulpWGK2yEV3mJpX2ayAMxym3hGAk/pBGAEcFI1DTXVBlGlOTvr6J0S3O54efTH
 +hrx+V+bYKHZPk3gK9mjN8rzC/u2pFbFZpf0cC2+G9XhFctmx8sIiWZ8kHrftp8b
 OaKXxo9lhfZhDuBj0zl3Yz59bFzS5VKPrHCGJ43pZRsxZsv8PXJnhmAsKT197fv+
 xQOrdN+L7Cc=
 =bCUA
 -----END PGP SIGNATURE-----

Merge tag 'perf-urgent-2021-03-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf fixes from Ingo Molnar:
 "Boundary condition fixes for bugs unearthed by the perf fuzzer"

* tag 'perf-urgent-2021-03-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/intel: Fix unchecked MSR access error caused by VLBR_EVENT
  perf/x86/intel: Fix a crash caused by zero PEBS status
This commit is contained in:
Linus Torvalds 2021-03-21 11:26:21 -07:00
parent 5ba33b488a 2dc0572f2c
commit 1c74516c2d
2 changed files with 4 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/x86/events/intel/core.c
View File

@ -3659,6 +3659,9 @@ static int intel_pmu_hw_config(struct perf_event *event)
return ret;
if (event->attr.precise_ip) {
if ((event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_FIXED_VLBR_EVENT)
return -EINVAL;
if (!(event->attr.freq || (event->attr.wakeup_events && !event->attr.watermark))) {
event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD;
if (!(event->attr.sample_type &

2
arch/x86/events/intel/ds.c
View File

@ -2010,7 +2010,7 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, struct perf_sample_d
*/
if (!pebs_status && cpuc->pebs_enabled &&
!(cpuc->pebs_enabled & (cpuc->pebs_enabled-1)))
pebs_status = cpuc->pebs_enabled;
pebs_status = p->status = cpuc->pebs_enabled;
bit = find_first_bit((unsigned long *)&pebs_status,
x86_pmu.max_pebs_events);