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mtd: s3c2410: parse the device configuration from OF node
Allows configuring Samsung's s3c2410 memory controller using a devicetree. Signed-off-by: Sergio Prado <sergio.prado@e-labworks.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
This commit is contained in:
parent
7baf9a04e5
commit
1c825ad1b8
2 changed files with 147 additions and 17 deletions
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@ -39,6 +39,8 @@
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/cpufreq.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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@ -185,6 +187,22 @@ struct s3c2410_nand_info {
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#endif
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};
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struct s3c24XX_nand_devtype_data {
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enum s3c_cpu_type type;
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};
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static const struct s3c24XX_nand_devtype_data s3c2410_nand_devtype_data = {
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.type = TYPE_S3C2410,
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};
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static const struct s3c24XX_nand_devtype_data s3c2412_nand_devtype_data = {
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.type = TYPE_S3C2412,
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};
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static const struct s3c24XX_nand_devtype_data s3c2440_nand_devtype_data = {
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.type = TYPE_S3C2440,
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};
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/* conversion functions */
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static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
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@ -794,6 +812,30 @@ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
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return -ENODEV;
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}
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static int s3c2410_nand_setup_data_interface(struct mtd_info *mtd,
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const struct nand_data_interface *conf,
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bool check_only)
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{
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struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
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struct s3c2410_platform_nand *pdata = info->platform;
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const struct nand_sdr_timings *timings;
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int tacls;
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timings = nand_get_sdr_timings(conf);
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if (IS_ERR(timings))
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return -ENOTSUPP;
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tacls = timings->tCLS_min - timings->tWP_min;
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if (tacls < 0)
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tacls = 0;
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pdata->tacls = DIV_ROUND_UP(tacls, 1000);
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pdata->twrph0 = DIV_ROUND_UP(timings->tWP_min, 1000);
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pdata->twrph1 = DIV_ROUND_UP(timings->tCLH_min, 1000);
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return s3c2410_nand_setrate(info);
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}
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/**
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* s3c2410_nand_init_chip - initialise a single instance of an chip
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* @info: The base NAND controller the chip is on.
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@ -808,9 +850,12 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
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struct s3c2410_nand_mtd *nmtd,
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struct s3c2410_nand_set *set)
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{
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struct device_node *np = info->device->of_node;
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struct nand_chip *chip = &nmtd->chip;
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void __iomem *regs = info->regs;
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nand_set_flash_node(chip, set->of_node);
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chip->write_buf = s3c2410_nand_write_buf;
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chip->read_buf = s3c2410_nand_read_buf;
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chip->select_chip = s3c2410_nand_select_chip;
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@ -819,6 +864,13 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
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chip->options = set->options;
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chip->controller = &info->controller;
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/*
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* let's keep behavior unchanged for legacy boards booting via pdata and
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* auto-detect timings only when booting with a device tree.
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*/
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if (np)
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chip->setup_data_interface = s3c2410_nand_setup_data_interface;
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switch (info->cpu_type) {
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case TYPE_S3C2410:
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chip->IO_ADDR_W = regs + S3C2410_NFDATA;
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@ -858,13 +910,12 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
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chip->ecc.mode = info->platform->ecc_mode;
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/* If you use u-boot BBT creation code, specifying this flag will
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* let the kernel fish out the BBT from the NAND, and also skip the
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* full NAND scan that can take 1/2s or so. Little things... */
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if (set->flash_bbt) {
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/*
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* If you use u-boot BBT creation code, specifying this flag will
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* let the kernel fish out the BBT from the NAND.
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*/
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if (set->flash_bbt)
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chip->bbt_options |= NAND_BBT_USE_FLASH;
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chip->options |= NAND_SKIP_BBTSCAN;
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}
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}
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/**
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@ -945,6 +996,78 @@ static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
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return -EINVAL;
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}
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if (chip->bbt_options & NAND_BBT_USE_FLASH)
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chip->options |= NAND_SKIP_BBTSCAN;
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return 0;
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}
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static const struct of_device_id s3c24xx_nand_dt_ids[] = {
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{
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.compatible = "samsung,s3c2410-nand",
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.data = &s3c2410_nand_devtype_data,
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}, {
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/* also compatible with s3c6400 */
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.compatible = "samsung,s3c2412-nand",
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.data = &s3c2412_nand_devtype_data,
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}, {
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.compatible = "samsung,s3c2440-nand",
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.data = &s3c2440_nand_devtype_data,
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, s3c24xx_nand_dt_ids);
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static int s3c24xx_nand_probe_dt(struct platform_device *pdev)
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{
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const struct s3c24XX_nand_devtype_data *devtype_data;
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struct s3c2410_platform_nand *pdata;
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struct s3c2410_nand_info *info = platform_get_drvdata(pdev);
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struct device_node *np = pdev->dev.of_node, *child;
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struct s3c2410_nand_set *sets;
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devtype_data = of_device_get_match_data(&pdev->dev);
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if (!devtype_data)
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return -ENODEV;
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info->cpu_type = devtype_data->type;
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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pdev->dev.platform_data = pdata;
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pdata->nr_sets = of_get_child_count(np);
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if (!pdata->nr_sets)
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return 0;
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sets = devm_kzalloc(&pdev->dev, sizeof(*sets) * pdata->nr_sets,
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GFP_KERNEL);
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if (!sets)
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return -ENOMEM;
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pdata->sets = sets;
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for_each_available_child_of_node(np, child) {
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sets->name = (char *)child->name;
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sets->of_node = child;
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sets->nr_chips = 1;
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of_node_get(child);
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sets++;
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}
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return 0;
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}
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static int s3c24xx_nand_probe_pdata(struct platform_device *pdev)
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{
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struct s3c2410_nand_info *info = platform_get_drvdata(pdev);
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info->cpu_type = platform_get_device_id(pdev)->driver_data;
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return 0;
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}
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@ -957,8 +1080,7 @@ static int s3c2410_nand_update_chip(struct s3c2410_nand_info *info,
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*/
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static int s3c24xx_nand_probe(struct platform_device *pdev)
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{
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struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
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enum s3c_cpu_type cpu_type;
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struct s3c2410_platform_nand *plat;
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struct s3c2410_nand_info *info;
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struct s3c2410_nand_mtd *nmtd;
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struct s3c2410_nand_set *sets;
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@ -968,8 +1090,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
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int nr_sets;
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int setno;
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cpu_type = platform_get_device_id(pdev)->driver_data;
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info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
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if (info == NULL) {
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err = -ENOMEM;
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@ -991,6 +1111,16 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
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s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
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if (pdev->dev.of_node)
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err = s3c24xx_nand_probe_dt(pdev);
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else
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err = s3c24xx_nand_probe_pdata(pdev);
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if (err)
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goto exit_error;
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plat = to_nand_plat(pdev);
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/* allocate and map the resource */
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/* currently we assume we have the one resource */
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@ -999,7 +1129,6 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
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info->device = &pdev->dev;
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info->platform = plat;
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info->cpu_type = cpu_type;
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info->regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(info->regs)) {
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dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs);
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/* initialise the hardware */
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err = s3c2410_nand_inithw(info);
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if (err != 0)
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goto exit_error;
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sets = (plat != NULL) ? plat->sets : NULL;
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nr_sets = (plat != NULL) ? plat->nr_sets : 1;
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sets++;
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}
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/* initialise the hardware */
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err = s3c2410_nand_inithw(info);
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if (err != 0)
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goto exit_error;
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err = s3c2410_nand_cpufreq_register(info);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to init cpufreq support\n");
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@ -1158,6 +1286,7 @@ static struct platform_driver s3c24xx_nand_driver = {
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.id_table = s3c24xx_driver_ids,
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.driver = {
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.name = "s3c24xx-nand",
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.of_match_table = s3c24xx_nand_dt_ids,
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},
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};
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@ -40,6 +40,7 @@ struct s3c2410_nand_set {
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char *name;
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int *nr_map;
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struct mtd_partition *partitions;
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struct device_node *of_node;
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};
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struct s3c2410_platform_nand {
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