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ARM: dts: r8a7790: lager: Enable UHS-I SDR-50

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Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}.

Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Wolfram Sang 2016-04-01 17:44:39 +02:00 committed by Simon Horman
parent 22f708b057
commit 1ca79699cb
1 changed files with 20 additions and 2 deletions
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22
arch/arm/boot/dts/r8a7790-lager.dts
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@ -345,11 +345,25 @@ scifa1_pins: serial1 {
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
sdhi0_pins_uhs: sd0_uhs {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <1800>;
};
sdhi2_pins: sd2 {
groups = "sdhi2_data4", "sdhi2_ctrl";
function = "sdhi2";
power-source = <3300>;
};
sdhi2_pins_uhs: sd2_uhs {
groups = "sdhi2_data4", "sdhi2_ctrl";
function = "sdhi2";
power-source = <1800>;
};
mmc1_pins: mmc1 {
@ -538,21 +552,25 @@ pmic: pmic@0 {
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
pinctrl-1 = <&sdhi0_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi0>;
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
sd-uhs-sdr50;
status = "okay";
};
&sdhi2 {
pinctrl-0 = <&sdhi2_pins>;
pinctrl-names = "default";
pinctrl-1 = <&sdhi2_pins_uhs>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&vcc_sdhi2>;
vqmmc-supply = <&vccq_sdhi2>;
cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
sd-uhs-sdr50;
status = "okay";
};