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Merge remote-tracking branches 'asoc/topic/max98090', 'asoc/topic/max98095', 'asoc/topic/max98357a', 'asoc/topic/max9877' and 'asoc/topic/max98925' into asoc-next

This commit is contained in:
Mark Brown 2015-08-30 15:54:57 +01:00
parent 373e515d65 62d6d47cb8 5549ce82e2 4ab0c591c1 623436af42 6eb1c2a63d
commit 1d1ed2c23e
25 changed files with 78 additions and 416 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/sound/max98357a.txt
View File

@ -4,7 +4,11 @@ This node models the Maxim MAX98357A DAC.
Required properties:
- compatible : "maxim,max98357a"
- sdmode-gpios : GPIO specifier for the GPIO -> DAC SDMODE pin
Optional properties:
- sdmode-gpios : GPIO specifier for the chip's SD_MODE pin.
If this option is not specified then driver does not manage
the pin state (e.g. chip is always on).
Example:

2
sound/soc/codecs/adav80x.c
View File

@ -113,7 +113,7 @@
#define ADAV80X_PLL_OUTE_SYSCLKPD(x) BIT(2 - (x))
static struct reg_default adav80x_reg_defaults[] = {
static const struct reg_default adav80x_reg_defaults[] = {
{ ADAV80X_PLAYBACK_CTRL, 0x01 },
{ ADAV80X_AUX_IN_CTRL, 0x01 },
{ ADAV80X_REC_CTRL, 0x02 },

2
sound/soc/codecs/alc5632.c
View File

@ -35,7 +35,7 @@
/*
* ALC5632 register cache
*/
static struct reg_default alc5632_reg_defaults[] = {
static const struct reg_default alc5632_reg_defaults[] = {
{ 2, 0x8080 }, /* R2 - Speaker Output Volume */
{ 4, 0x8080 }, /* R4 - Headphone Output Volume */
{ 6, 0x8080 }, /* R6 - AUXOUT Volume */

6
sound/soc/codecs/da7210.c
View File

@ -680,7 +680,7 @@ struct da7210_priv {
int master;
};
static struct reg_default da7210_reg_defaults[] = {
static const struct reg_default da7210_reg_defaults[] = {
{ 0x00, 0x00 },
{ 0x01, 0x11 },
{ 0x03, 0x00 },
@ -1182,7 +1182,7 @@ static struct snd_soc_codec_driver soc_codec_dev_da7210 = {
#if IS_ENABLED(CONFIG_I2C)
static struct reg_default da7210_regmap_i2c_patch[] = {
static const struct reg_default da7210_regmap_i2c_patch[] = {
/* System controller master disable */
{ DA7210_STARTUP1, 0x00 },
@ -1268,7 +1268,7 @@ static struct i2c_driver da7210_i2c_driver = {
#if defined(CONFIG_SPI_MASTER)
static struct reg_default da7210_regmap_spi_patch[] = {
static const struct reg_default da7210_regmap_spi_patch[] = {
/* Dummy read to give two pulses over nCS for SPI */
{ DA7210_AUX2, 0x00 },
{ DA7210_AUX2, 0x00 },

2
sound/soc/codecs/da7213.c
View File

@ -954,7 +954,7 @@ static const struct snd_soc_dapm_route da7213_audio_map[] = {
{"LINE", NULL, "Lineout PGA"},
};
static struct reg_default da7213_reg_defaults[] = {
static const struct reg_default da7213_reg_defaults[] = {
{ DA7213_DIG_ROUTING_DAI, 0x10 },
{ DA7213_SR, 0x0A },
{ DA7213_REFERENCES, 0x80 },

2
sound/soc/codecs/da732x.c
View File

@ -43,7 +43,7 @@ struct da732x_priv {
/*
* da732x register cache - default settings
*/
static struct reg_default da732x_reg_cache[] = {
static const struct reg_default da732x_reg_cache[] = {
{ DA732X_REG_REF1 , 0x02 },
{ DA732X_REG_BIAS_EN , 0x80 },
{ DA732X_REG_BIAS1 , 0x00 },

2
sound/soc/codecs/da9055.c
View File

@ -948,7 +948,7 @@ struct da9055_priv {
struct da9055_platform_data *pdata;
};
static struct reg_default da9055_reg_defaults[] = {
static const struct reg_default da9055_reg_defaults[] = {
{ 0x21, 0x10 },
{ 0x22, 0x0A },
{ 0x23, 0x00 },

2
sound/soc/codecs/isabelle.c
View File

@ -33,7 +33,7 @@
/* Register default values for ISABELLE driver. */
static struct reg_default isabelle_reg_defs[] = {
static const struct reg_default isabelle_reg_defs[] = {
{ 0, 0x00 },
{ 1, 0x00 },
{ 2, 0x00 },

2
sound/soc/codecs/lm49453.c
View File

@ -30,7 +30,7 @@
#include <asm/div64.h>
#include "lm49453.h"
static struct reg_default lm49453_reg_defs[] = {
static const struct reg_default lm49453_reg_defs[] = {
{ 0, 0x00 },
{ 1, 0x00 },
{ 2, 0x00 },

2
sound/soc/codecs/max9768.c
View File

@ -35,7 +35,7 @@ struct max9768 {
u32 flags;
};
static struct reg_default max9768_default_regs[] = {
static const struct reg_default max9768_default_regs[] = {
{ 0, 0 },
{ 3, MAX9768_CTRL_FILTERLESS},
};

80
sound/soc/codecs/max98090.c
View File

@ -267,75 +267,8 @@ static bool max98090_volatile_register(struct device *dev, unsigned int reg)
static bool max98090_readable_register(struct device *dev, unsigned int reg)
{
switch (reg) {
case M98090_REG_DEVICE_STATUS:
case M98090_REG_JACK_STATUS:
case M98090_REG_INTERRUPT_S:
case M98090_REG_RESERVED:
case M98090_REG_LINE_INPUT_CONFIG:
case M98090_REG_LINE_INPUT_LEVEL:
case M98090_REG_INPUT_MODE:
case M98090_REG_MIC1_INPUT_LEVEL:
case M98090_REG_MIC2_INPUT_LEVEL:
case M98090_REG_MIC_BIAS_VOLTAGE:
case M98090_REG_DIGITAL_MIC_ENABLE:
case M98090_REG_DIGITAL_MIC_CONFIG:
case M98090_REG_LEFT_ADC_MIXER:
case M98090_REG_RIGHT_ADC_MIXER:
case M98090_REG_LEFT_ADC_LEVEL:
case M98090_REG_RIGHT_ADC_LEVEL:
case M98090_REG_ADC_BIQUAD_LEVEL:
case M98090_REG_ADC_SIDETONE:
case M98090_REG_SYSTEM_CLOCK:
case M98090_REG_CLOCK_MODE:
case M98090_REG_CLOCK_RATIO_NI_MSB:
case M98090_REG_CLOCK_RATIO_NI_LSB:
case M98090_REG_CLOCK_RATIO_MI_MSB:
case M98090_REG_CLOCK_RATIO_MI_LSB:
case M98090_REG_MASTER_MODE:
case M98090_REG_INTERFACE_FORMAT:
case M98090_REG_TDM_CONTROL:
case M98090_REG_TDM_FORMAT:
case M98090_REG_IO_CONFIGURATION:
case M98090_REG_FILTER_CONFIG:
case M98090_REG_DAI_PLAYBACK_LEVEL:
case M98090_REG_DAI_PLAYBACK_LEVEL_EQ:
case M98090_REG_LEFT_HP_MIXER:
case M98090_REG_RIGHT_HP_MIXER:
case M98090_REG_HP_CONTROL:
case M98090_REG_LEFT_HP_VOLUME:
case M98090_REG_RIGHT_HP_VOLUME:
case M98090_REG_LEFT_SPK_MIXER:
case M98090_REG_RIGHT_SPK_MIXER:
case M98090_REG_SPK_CONTROL:
case M98090_REG_LEFT_SPK_VOLUME:
case M98090_REG_RIGHT_SPK_VOLUME:
case M98090_REG_DRC_TIMING:
case M98090_REG_DRC_COMPRESSOR:
case M98090_REG_DRC_EXPANDER:
case M98090_REG_DRC_GAIN:
case M98090_REG_RCV_LOUTL_MIXER:
case M98090_REG_RCV_LOUTL_CONTROL:
case M98090_REG_RCV_LOUTL_VOLUME:
case M98090_REG_LOUTR_MIXER:
case M98090_REG_LOUTR_CONTROL:
case M98090_REG_LOUTR_VOLUME:
case M98090_REG_JACK_DETECT:
case M98090_REG_INPUT_ENABLE:
case M98090_REG_OUTPUT_ENABLE:
case M98090_REG_LEVEL_CONTROL:
case M98090_REG_DSP_FILTER_ENABLE:
case M98090_REG_BIAS_CONTROL:
case M98090_REG_DAC_CONTROL:
case M98090_REG_ADC_CONTROL:
case M98090_REG_DEVICE_SHUTDOWN:
case M98090_REG_EQUALIZER_BASE ... M98090_REG_EQUALIZER_BASE + 0x68:
case M98090_REG_RECORD_BIQUAD_BASE ... M98090_REG_RECORD_BIQUAD_BASE + 0x0E:
case M98090_REG_DMIC3_VOLUME:
case M98090_REG_DMIC4_VOLUME:
case M98090_REG_DMIC34_BQ_PREATTEN:
case M98090_REG_RECORD_TDM_SLOT:
case M98090_REG_SAMPLE_RATE:
case M98090_REG_DMIC34_BIQUAD_BASE ... M98090_REG_DMIC34_BIQUAD_BASE + 0x0E:
case M98090_REG_DEVICE_STATUS ... M98090_REG_INTERRUPT_S:
case M98090_REG_LINE_INPUT_CONFIG ... 0xD1:
case M98090_REG_REVISION_ID:
return true;
default:
@ -1818,10 +1751,13 @@ static int max98090_set_bias_level(struct snd_soc_codec *codec,
if (IS_ERR(max98090->mclk))
break;
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON)
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) {
clk_disable_unprepare(max98090->mclk);
else
clk_prepare_enable(max98090->mclk);
} else {
ret = clk_prepare_enable(max98090->mclk);
if (ret)
return ret;
}
break;
case SND_SOC_BIAS_STANDBY:

318
sound/soc/codecs/max98095.c
View File

@ -202,300 +202,36 @@ static const struct reg_default max98095_reg_def[] = {
{ 0xff, 0x00 }, /* FF */
};
static struct {
int readable;
int writable;
} max98095_access[M98095_REG_CNT] = {
{ 0x00, 0x00 }, /* 00 */
{ 0xFF, 0x00 }, /* 01 */
{ 0xFF, 0x00 }, /* 02 */
{ 0xFF, 0x00 }, /* 03 */
{ 0xFF, 0x00 }, /* 04 */
{ 0xFF, 0x00 }, /* 05 */
{ 0xFF, 0x00 }, /* 06 */
{ 0xFF, 0x00 }, /* 07 */
{ 0xFF, 0x00 }, /* 08 */
{ 0xFF, 0x00 }, /* 09 */
{ 0xFF, 0x00 }, /* 0A */
{ 0xFF, 0x00 }, /* 0B */
{ 0xFF, 0x00 }, /* 0C */
{ 0xFF, 0x00 }, /* 0D */
{ 0xFF, 0x00 }, /* 0E */
{ 0xFF, 0x9F }, /* 0F */
{ 0xFF, 0xFF }, /* 10 */
{ 0xFF, 0xFF }, /* 11 */
{ 0xFF, 0xFF }, /* 12 */
{ 0xFF, 0xFF }, /* 13 */
{ 0xFF, 0xFF }, /* 14 */
{ 0xFF, 0xFF }, /* 15 */
{ 0xFF, 0xFF }, /* 16 */
{ 0xFF, 0xFF }, /* 17 */
{ 0xFF, 0xFF }, /* 18 */
{ 0xFF, 0xFF }, /* 19 */
{ 0xFF, 0xFF }, /* 1A */
{ 0xFF, 0xFF }, /* 1B */
{ 0xFF, 0xFF }, /* 1C */
{ 0xFF, 0xFF }, /* 1D */
{ 0xFF, 0x77 }, /* 1E */
{ 0xFF, 0x77 }, /* 1F */
{ 0xFF, 0x77 }, /* 20 */
{ 0xFF, 0x77 }, /* 21 */
{ 0xFF, 0x77 }, /* 22 */
{ 0xFF, 0x77 }, /* 23 */
{ 0xFF, 0xFF }, /* 24 */
{ 0xFF, 0x7F }, /* 25 */
{ 0xFF, 0x31 }, /* 26 */
{ 0xFF, 0xFF }, /* 27 */
{ 0xFF, 0xFF }, /* 28 */
{ 0xFF, 0xFF }, /* 29 */
{ 0xFF, 0xF7 }, /* 2A */
{ 0xFF, 0x2F }, /* 2B */
{ 0xFF, 0xEF }, /* 2C */
{ 0xFF, 0xFF }, /* 2D */
{ 0xFF, 0xFF }, /* 2E */
{ 0xFF, 0xFF }, /* 2F */
{ 0xFF, 0xFF }, /* 30 */
{ 0xFF, 0xFF }, /* 31 */
{ 0xFF, 0xFF }, /* 32 */
{ 0xFF, 0xFF }, /* 33 */
{ 0xFF, 0xF7 }, /* 34 */
{ 0xFF, 0x2F }, /* 35 */
{ 0xFF, 0xCF }, /* 36 */
{ 0xFF, 0xFF }, /* 37 */
{ 0xFF, 0xFF }, /* 38 */
{ 0xFF, 0xFF }, /* 39 */
{ 0xFF, 0xFF }, /* 3A */
{ 0xFF, 0xFF }, /* 3B */
{ 0xFF, 0xFF }, /* 3C */
{ 0xFF, 0xFF }, /* 3D */
{ 0xFF, 0xF7 }, /* 3E */
{ 0xFF, 0x2F }, /* 3F */
{ 0xFF, 0xCF }, /* 40 */
{ 0xFF, 0xFF }, /* 41 */
{ 0xFF, 0x77 }, /* 42 */
{ 0xFF, 0xFF }, /* 43 */
{ 0xFF, 0xFF }, /* 44 */
{ 0xFF, 0xFF }, /* 45 */
{ 0xFF, 0xFF }, /* 46 */
{ 0xFF, 0xFF }, /* 47 */
{ 0xFF, 0xFF }, /* 48 */
{ 0xFF, 0x0F }, /* 49 */
{ 0xFF, 0xFF }, /* 4A */
{ 0xFF, 0xFF }, /* 4B */
{ 0xFF, 0x3F }, /* 4C */
{ 0xFF, 0x3F }, /* 4D */
{ 0xFF, 0x3F }, /* 4E */
{ 0xFF, 0xFF }, /* 4F */
{ 0xFF, 0x7F }, /* 50 */
{ 0xFF, 0x7F }, /* 51 */
{ 0xFF, 0x0F }, /* 52 */
{ 0xFF, 0x3F }, /* 53 */
{ 0xFF, 0x3F }, /* 54 */
{ 0xFF, 0x3F }, /* 55 */
{ 0xFF, 0xFF }, /* 56 */
{ 0xFF, 0xFF }, /* 57 */
{ 0xFF, 0xBF }, /* 58 */
{ 0xFF, 0x1F }, /* 59 */
{ 0xFF, 0xBF }, /* 5A */
{ 0xFF, 0x1F }, /* 5B */
{ 0xFF, 0xBF }, /* 5C */
{ 0xFF, 0x3F }, /* 5D */
{ 0xFF, 0x3F }, /* 5E */
{ 0xFF, 0x7F }, /* 5F */
{ 0xFF, 0x7F }, /* 60 */
{ 0xFF, 0x47 }, /* 61 */
{ 0xFF, 0x9F }, /* 62 */
{ 0xFF, 0x9F }, /* 63 */
{ 0xFF, 0x9F }, /* 64 */
{ 0xFF, 0x9F }, /* 65 */
{ 0xFF, 0x9F }, /* 66 */
{ 0xFF, 0xBF }, /* 67 */
{ 0xFF, 0xBF }, /* 68 */
{ 0xFF, 0xFF }, /* 69 */
{ 0xFF, 0xFF }, /* 6A */
{ 0xFF, 0x7F }, /* 6B */
{ 0xFF, 0xF7 }, /* 6C */
{ 0xFF, 0xFF }, /* 6D */
{ 0xFF, 0xFF }, /* 6E */
{ 0xFF, 0x1F }, /* 6F */
{ 0xFF, 0xF7 }, /* 70 */
{ 0xFF, 0xFF }, /* 71 */
{ 0xFF, 0xFF }, /* 72 */
{ 0xFF, 0x1F }, /* 73 */
{ 0xFF, 0xF7 }, /* 74 */
{ 0xFF, 0xFF }, /* 75 */
{ 0xFF, 0xFF }, /* 76 */
{ 0xFF, 0x1F }, /* 77 */
{ 0xFF, 0xF7 }, /* 78 */
{ 0xFF, 0xFF }, /* 79 */
{ 0xFF, 0xFF }, /* 7A */
{ 0xFF, 0x1F }, /* 7B */
{ 0xFF, 0xF7 }, /* 7C */
{ 0xFF, 0xFF }, /* 7D */
{ 0xFF, 0xFF }, /* 7E */
{ 0xFF, 0x1F }, /* 7F */
{ 0xFF, 0xF7 }, /* 80 */
{ 0xFF, 0xFF }, /* 81 */
{ 0xFF, 0xFF }, /* 82 */
{ 0xFF, 0x1F }, /* 83 */
{ 0xFF, 0x7F }, /* 84 */
{ 0xFF, 0x0F }, /* 85 */
{ 0xFF, 0xD8 }, /* 86 */
{ 0xFF, 0xFF }, /* 87 */
{ 0xFF, 0xEF }, /* 88 */
{ 0xFF, 0xFE }, /* 89 */
{ 0xFF, 0xFE }, /* 8A */
{ 0xFF, 0xFF }, /* 8B */
{ 0xFF, 0xFF }, /* 8C */
{ 0xFF, 0x3F }, /* 8D */
{ 0xFF, 0xFF }, /* 8E */
{ 0xFF, 0x3F }, /* 8F */
{ 0xFF, 0x8F }, /* 90 */
{ 0xFF, 0xFF }, /* 91 */
{ 0xFF, 0x3F }, /* 92 */
{ 0xFF, 0xFF }, /* 93 */
{ 0xFF, 0xFF }, /* 94 */
{ 0xFF, 0x0F }, /* 95 */
{ 0xFF, 0x3F }, /* 96 */
{ 0xFF, 0x8C }, /* 97 */
{ 0x00, 0x00 }, /* 98 */
{ 0x00, 0x00 }, /* 99 */
{ 0x00, 0x00 }, /* 9A */
{ 0x00, 0x00 }, /* 9B */
{ 0x00, 0x00 }, /* 9C */
{ 0x00, 0x00 }, /* 9D */
{ 0x00, 0x00 }, /* 9E */
{ 0x00, 0x00 }, /* 9F */
{ 0x00, 0x00 }, /* A0 */
{ 0x00, 0x00 }, /* A1 */
{ 0x00, 0x00 }, /* A2 */
{ 0x00, 0x00 }, /* A3 */
{ 0x00, 0x00 }, /* A4 */
{ 0x00, 0x00 }, /* A5 */
{ 0x00, 0x00 }, /* A6 */
{ 0x00, 0x00 }, /* A7 */
{ 0x00, 0x00 }, /* A8 */
{ 0x00, 0x00 }, /* A9 */
{ 0x00, 0x00 }, /* AA */
{ 0x00, 0x00 }, /* AB */
{ 0x00, 0x00 }, /* AC */
{ 0x00, 0x00 }, /* AD */
{ 0x00, 0x00 }, /* AE */
{ 0x00, 0x00 }, /* AF */
{ 0x00, 0x00 }, /* B0 */
{ 0x00, 0x00 }, /* B1 */
{ 0x00, 0x00 }, /* B2 */
{ 0x00, 0x00 }, /* B3 */
{ 0x00, 0x00 }, /* B4 */
{ 0x00, 0x00 }, /* B5 */
{ 0x00, 0x00 }, /* B6 */
{ 0x00, 0x00 }, /* B7 */
{ 0x00, 0x00 }, /* B8 */
{ 0x00, 0x00 }, /* B9 */
{ 0x00, 0x00 }, /* BA */
{ 0x00, 0x00 }, /* BB */
{ 0x00, 0x00 }, /* BC */
{ 0x00, 0x00 }, /* BD */
{ 0x00, 0x00 }, /* BE */
{ 0x00, 0x00 }, /* BF */
{ 0x00, 0x00 }, /* C0 */
{ 0x00, 0x00 }, /* C1 */
{ 0x00, 0x00 }, /* C2 */
{ 0x00, 0x00 }, /* C3 */
{ 0x00, 0x00 }, /* C4 */
{ 0x00, 0x00 }, /* C5 */
{ 0x00, 0x00 }, /* C6 */
{ 0x00, 0x00 }, /* C7 */
{ 0x00, 0x00 }, /* C8 */
{ 0x00, 0x00 }, /* C9 */
{ 0x00, 0x00 }, /* CA */
{ 0x00, 0x00 }, /* CB */
{ 0x00, 0x00 }, /* CC */
{ 0x00, 0x00 }, /* CD */
{ 0x00, 0x00 }, /* CE */
{ 0x00, 0x00 }, /* CF */
{ 0x00, 0x00 }, /* D0 */
{ 0x00, 0x00 }, /* D1 */
{ 0x00, 0x00 }, /* D2 */
{ 0x00, 0x00 }, /* D3 */
{ 0x00, 0x00 }, /* D4 */
{ 0x00, 0x00 }, /* D5 */
{ 0x00, 0x00 }, /* D6 */
{ 0x00, 0x00 }, /* D7 */
{ 0x00, 0x00 }, /* D8 */
{ 0x00, 0x00 }, /* D9 */
{ 0x00, 0x00 }, /* DA */
{ 0x00, 0x00 }, /* DB */
{ 0x00, 0x00 }, /* DC */
{ 0x00, 0x00 }, /* DD */
{ 0x00, 0x00 }, /* DE */
{ 0x00, 0x00 }, /* DF */
{ 0x00, 0x00 }, /* E0 */
{ 0x00, 0x00 }, /* E1 */
{ 0x00, 0x00 }, /* E2 */
{ 0x00, 0x00 }, /* E3 */
{ 0x00, 0x00 }, /* E4 */
{ 0x00, 0x00 }, /* E5 */
{ 0x00, 0x00 }, /* E6 */
{ 0x00, 0x00 }, /* E7 */
{ 0x00, 0x00 }, /* E8 */
{ 0x00, 0x00 }, /* E9 */
{ 0x00, 0x00 }, /* EA */
{ 0x00, 0x00 }, /* EB */
{ 0x00, 0x00 }, /* EC */
{ 0x00, 0x00 }, /* ED */
{ 0x00, 0x00 }, /* EE */
{ 0x00, 0x00 }, /* EF */
{ 0x00, 0x00 }, /* F0 */
{ 0x00, 0x00 }, /* F1 */
{ 0x00, 0x00 }, /* F2 */
{ 0x00, 0x00 }, /* F3 */
{ 0x00, 0x00 }, /* F4 */
{ 0x00, 0x00 }, /* F5 */
{ 0x00, 0x00 }, /* F6 */
{ 0x00, 0x00 }, /* F7 */
{ 0x00, 0x00 }, /* F8 */
{ 0x00, 0x00 }, /* F9 */
{ 0x00, 0x00 }, /* FA */
{ 0x00, 0x00 }, /* FB */
{ 0x00, 0x00 }, /* FC */
{ 0x00, 0x00 }, /* FD */
{ 0x00, 0x00 }, /* FE */
{ 0xFF, 0x00 }, /* FF */
};
static bool max98095_readable(struct device *dev, unsigned int reg)
{
if (reg >= M98095_REG_CNT)
return 0;
return max98095_access[reg].readable != 0;
switch (reg) {
case M98095_001_HOST_INT_STS ... M98095_097_PWR_SYS:
case M98095_0FF_REV_ID:
return true;
default:
return false;
}
}
static bool max98095_writeable(struct device *dev, unsigned int reg)
{
switch (reg) {
case M98095_00F_HOST_CFG ... M98095_097_PWR_SYS:
return true;
default:
return false;
}
}
static bool max98095_volatile(struct device *dev, unsigned int reg)
{
if (reg > M98095_REG_MAX_CACHED)
return 1;
switch (reg) {
case M98095_000_HOST_DATA:
case M98095_001_HOST_INT_STS:
case M98095_002_HOST_RSP_STS:
case M98095_003_HOST_CMD_STS:
case M98095_004_CODEC_STS:
case M98095_005_DAI1_ALC_STS:
case M98095_006_DAI2_ALC_STS:
case M98095_007_JACK_AUTO_STS:
case M98095_008_JACK_MANUAL_STS:
case M98095_009_JACK_VBAT_STS:
case M98095_00A_ACC_ADC_STS:
case M98095_00B_MIC_NG_AGC_STS:
case M98095_00C_SPK_L_VOLT_STS:
case M98095_00D_SPK_R_VOLT_STS:
case M98095_00E_TEMP_SENSOR_STS:
return 1;
case M98095_000_HOST_DATA ... M98095_00E_TEMP_SENSOR_STS:
case M98095_REG_MAX_CACHED + 1 ... M98095_0FF_REV_ID:
return true;
default:
return false;
}
return 0;
}
static const struct regmap_config max98095_regmap = {
@ -508,6 +244,7 @@ static const struct regmap_config max98095_regmap = {
.cache_type = REGCACHE_RBTREE,
.readable_reg = max98095_readable,
.writeable_reg = max98095_writeable,
.volatile_reg = max98095_volatile,
};
@ -1653,10 +1390,13 @@ static int max98095_set_bias_level(struct snd_soc_codec *codec,
if (IS_ERR(max98095->mclk))
break;
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON)
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) {
clk_disable_unprepare(max98095->mclk);
else
clk_prepare_enable(max98095->mclk);
} else {
ret = clk_prepare_enable(max98095->mclk);
if (ret)
return ret;
}
break;
case SND_SOC_BIAS_STANDBY:

23
sound/soc/codecs/max98357a.c
View File

@ -31,6 +31,9 @@ static int max98357a_daiops_trigger(struct snd_pcm_substream *substream,
{
struct gpio_desc *sdmode = snd_soc_dai_get_drvdata(dai);
if (!sdmode)
return 0;
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
@ -48,24 +51,21 @@ static int max98357a_daiops_trigger(struct snd_pcm_substream *substream,
}
static const struct snd_soc_dapm_widget max98357a_dapm_widgets[] = {
SND_SOC_DAPM_DAC("SDMode", NULL, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_OUTPUT("Speaker"),
};
static const struct snd_soc_dapm_route max98357a_dapm_routes[] = {
{"Speaker", NULL, "SDMode"},
{"Speaker", NULL, "HiFi Playback"},
};
static int max98357a_codec_probe(struct snd_soc_codec *codec)
{
struct gpio_desc *sdmode;
sdmode = devm_gpiod_get(codec->dev, "sdmode", GPIOD_OUT_LOW);
if (IS_ERR(sdmode)) {
dev_err(codec->dev, "%s() unable to get sdmode GPIO: %ld\n",
__func__, PTR_ERR(sdmode));
sdmode = devm_gpiod_get_optional(codec->dev, "sdmode", GPIOD_OUT_LOW);
if (IS_ERR(sdmode))
return PTR_ERR(sdmode);
}
snd_soc_codec_set_drvdata(codec, sdmode);
return 0;
@ -104,15 +104,8 @@ static struct snd_soc_dai_driver max98357a_dai_driver = {
static int max98357a_platform_probe(struct platform_device *pdev)
{
int ret;
ret = snd_soc_register_codec(&pdev->dev, &max98357a_codec_driver,
return snd_soc_register_codec(&pdev->dev, &max98357a_codec_driver,
&max98357a_dai_driver, 1);
if (ret)
dev_err(&pdev->dev, "%s() error registering codec driver: %d\n",
__func__, ret);
return ret;
}
static int max98357a_platform_remove(struct platform_device *pdev)

18
sound/soc/codecs/max9877.c
View File

@ -20,9 +20,7 @@
#include "max9877.h"
static struct regmap *regmap;
static struct reg_default max9877_regs[] = {
static const struct reg_default max9877_regs[] = {
{ 0, 0x40 },
{ 1, 0x00 },
{ 2, 0x00 },
@ -123,7 +121,7 @@ static const struct snd_soc_dapm_route max9877_dapm_routes[] = {
{ "HPR", NULL, "SHDN" },
};
static const struct snd_soc_codec_driver max9877_codec = {
static const struct snd_soc_component_driver max9877_component_driver = {
.controls = max9877_controls,
.num_controls = ARRAY_SIZE(max9877_controls),
@ -145,6 +143,7 @@ static const struct regmap_config max9877_regmap = {
static int max9877_i2c_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
struct regmap *regmap;
int i;
regmap = devm_regmap_init_i2c(client, &max9877_regmap);
@ -155,14 +154,8 @@ static int max9877_i2c_probe(struct i2c_client *client,
for (i = 0; i < ARRAY_SIZE(max9877_regs); i++)
regmap_write(regmap, max9877_regs[i].reg, max9877_regs[i].def);
return snd_soc_register_codec(&client->dev, &max9877_codec, NULL, 0);
}
static int max9877_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_codec(&client->dev);
return 0;
return devm_snd_soc_register_component(&client->dev,
&max9877_component_driver, NULL, 0);
}
static const struct i2c_device_id max9877_i2c_id[] = {
@ -176,7 +169,6 @@ static struct i2c_driver max9877_i2c_driver = {
.name = "max9877",
},
.probe = max9877_i2c_probe,
.remove = max9877_i2c_remove,
.id_table = max9877_i2c_id,
};

3
sound/soc/codecs/max98925.c
View File

@ -271,8 +271,6 @@ static inline int max98925_rate_value(struct snd_soc_codec *codec,
break;
}
}
dev_dbg(codec->dev, "%s: sample rate is %d, returning %d\n",
__func__, rate_table[i].rate, *value);
return ret;
}
@ -523,7 +521,6 @@ static int max98925_probe(struct snd_soc_codec *codec)
struct max98925_priv *max98925 = snd_soc_codec_get_drvdata(codec);
max98925->codec = codec;
codec->control_data = max98925->regmap;
regmap_write(max98925->regmap, MAX98925_GLOBAL_ENABLE, 0x00);
/* It's not the default but we need to set DAI_DLY */
regmap_write(max98925->regmap,

2
sound/soc/codecs/ml26124.c
View File

@ -199,7 +199,7 @@ static const struct clk_coeff coeff_div[] = {
{12288000, 48000, 0xc, 0x0, 0x30, 0x0, 0x4},
};
static struct reg_default ml26124_reg[] = {
static const struct reg_default ml26124_reg[] = {
/* CLOCK control Register */
{0x00, 0x00 }, /* Sampling Rate */
{0x02, 0x00}, /* PLL NL */

4
sound/soc/codecs/rt286.c
View File

@ -38,7 +38,7 @@
#define RT288_VENDOR_ID 0x10ec0288
struct rt286_priv {
struct reg_default *index_cache;
const struct reg_default *index_cache;
int index_cache_size;
struct regmap *regmap;
struct snd_soc_codec *codec;
@ -50,7 +50,7 @@ struct rt286_priv {
int clk_id;
};
static struct reg_default rt286_index_def[] = {
static const struct reg_default rt286_index_def[] = {
{ 0x01, 0xaaaa },
{ 0x02, 0x8aaa },
{ 0x03, 0x0002 },

2
sound/soc/codecs/rt5651.c
View File

@ -46,7 +46,7 @@ static const struct regmap_range_cfg rt5651_ranges[] = {
.window_len = 0x1, },
};
static struct reg_default init_list[] = {
static const struct reg_default init_list[] = {
{RT5651_PR_BASE + 0x3d, 0x3e00},
};

2
sound/soc/codecs/tas2552.c
View File

@ -38,7 +38,7 @@
#include "tas2552.h"
static struct reg_default tas2552_reg_defs[] = {
static const struct reg_default tas2552_reg_defs[] = {
{TAS2552_CFG_1, 0x22},
{TAS2552_CFG_3, 0x80},
{TAS2552_DOUT, 0x00},

2
sound/soc/codecs/tfa9879.c
View File

@ -160,7 +160,7 @@ static int tfa9879_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return 0;
}
static struct reg_default tfa9879_regs[] = {
static const struct reg_default tfa9879_regs[] = {
{ TFA9879_DEVICE_CONTROL, 0x0000 }, /* 0x00 */
{ TFA9879_SERIAL_INTERFACE_1, 0x0a18 }, /* 0x01 */
{ TFA9879_PCM_IOM2_FORMAT_1, 0x0007 }, /* 0x02 */

2
sound/soc/codecs/wm2200.c
View File

@ -166,7 +166,7 @@ static const struct wm_adsp_region wm2200_dsp2_regions[] = {
{ .type = WMFW_ADSP1_ZM, .base = WM2200_DSP2_ZM_BASE },
};
static struct reg_default wm2200_reg_defaults[] = {
static const struct reg_default wm2200_reg_defaults[] = {
{ 0x000B, 0x0000 }, /* R11 - Tone Generator 1 */
{ 0x0102, 0x0000 }, /* R258 - Clocking 3 */
{ 0x0103, 0x0011 }, /* R259 - Clocking 4 */

2
sound/soc/codecs/wm8962.c
View File

@ -113,7 +113,7 @@ WM8962_REGULATOR_EVENT(5)
WM8962_REGULATOR_EVENT(6)
WM8962_REGULATOR_EVENT(7)
static struct reg_default wm8962_reg[] = {
static const struct reg_default wm8962_reg[] = {
{ 0, 0x009F }, /* R0 - Left Input volume */
{ 1, 0x049F }, /* R1 - Right Input volume */
{ 2, 0x0000 }, /* R2 - HPOUTL volume */

4
sound/soc/codecs/wm8993.c
View File

@ -41,7 +41,7 @@ static const char *wm8993_supply_names[WM8993_NUM_SUPPLIES] = {
"SPKVDD",
};
static struct reg_default wm8993_reg_defaults[] = {
static const struct reg_default wm8993_reg_defaults[] = {
{ 1, 0x0000 }, /* R1 - Power Management (1) */
{ 2, 0x6000 }, /* R2 - Power Management (2) */
{ 3, 0x0000 }, /* R3 - Power Management (3) */
@ -1595,7 +1595,7 @@ static int wm8993_resume(struct snd_soc_codec *codec)
#endif
/* Tune DC servo configuration */
static struct reg_default wm8993_regmap_patch[] = {
static const struct reg_default wm8993_regmap_patch[] = {
{ 0x44, 3 },
{ 0x56, 3 },
{ 0x44, 0 },

2
sound/soc/codecs/wm8996.c
View File

@ -117,7 +117,7 @@ WM8996_REGULATOR_EVENT(0)
WM8996_REGULATOR_EVENT(1)
WM8996_REGULATOR_EVENT(2)
static struct reg_default wm8996_reg[] = {
static const struct reg_default wm8996_reg[] = {
{ WM8996_POWER_MANAGEMENT_1, 0x0 },
{ WM8996_POWER_MANAGEMENT_2, 0x0 },
{ WM8996_POWER_MANAGEMENT_3, 0x0 },

2
sound/soc/codecs/wm9081.c
View File

@ -30,7 +30,7 @@
#include <sound/wm9081.h>
#include "wm9081.h"
static struct reg_default wm9081_reg[] = {
static const struct reg_default wm9081_reg[] = {
{ 2, 0x00B9 }, /* R2 - Analogue Lineout */
{ 3, 0x00B9 }, /* R3 - Analogue Speaker PGA */
{ 4, 0x0001 }, /* R4 - VMID Control */