arm64: dts: tqma8mqml: add PCIe support
Add PCIe support to TQMa8MxML series. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -5,6 +5,7 @@
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/dts-v1/;
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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#include "imx8mm-tqma8mqml.dtsi"
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#include "mba8mx.dtsi"
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@ -58,6 +59,24 @@
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};
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};
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&pcie_phy {
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clocks = <&pcie0_refclk>;
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status = "okay";
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};
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&pcie0 {
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reset-gpio = <&expander0 14 GPIO_ACTIVE_LOW>;
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clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
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<&pcie0_refclk>;
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clock-names = "pcie", "pcie_aux", "pcie_bus";
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assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
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<&clk IMX8MM_CLK_PCIE1_CTRL>;
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assigned-clock-rates = <10000000>, <250000000>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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<&clk IMX8MM_SYS_PLL2_250M>;
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status = "okay";
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};
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&sai3 {
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assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
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@ -227,6 +227,11 @@
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};
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};
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&pcie_phy {
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fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
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fsl,clkreq-unsupported;
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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@ -66,6 +66,12 @@
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};
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};
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pcie0_refclk: pcie0-refclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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reg_hub_vbus: regulator-hub-vbus {
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compatible = "regulator-fixed";
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regulator-name = "MBA8MX_HUB_VBUS";
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