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spi: intel: 64k erase is supported from Canon Lake and beyond
The hardware sequencer in Intel Canon Lake and beyond supports also 64k erase command. The SPI-NOR core uses SFDP (Serial Flash Discovery Parameter) to figure out what the chip actually supports and only issues 64k erase if it is supported. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20220816125537.89389-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1100,6 +1100,7 @@ static int intel_spi_init(struct intel_spi *ispi)
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ispi->pregs = ispi->base + CNL_PR;
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ispi->pregs = ispi->base + CNL_PR;
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ispi->nregions = CNL_FREG_NUM;
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ispi->nregions = CNL_FREG_NUM;
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ispi->pr_num = CNL_PR_NUM;
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ispi->pr_num = CNL_PR_NUM;
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erase_64k = true;
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break;
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break;
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default:
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default:
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