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drm: rockchip/dw_hdmi-rockchip: improve for HDMI electrical test
When pixel clock less than 148.5MHz, make sloopboost=2 tklvl=20 cklvl=13 increase rasing/falling time and increase data & clock voltage driver. When pixel clock less than 74.25MHz, make sloopboost=0 tklvl=19 cklvl=18, increase data and clock voltage driver. Signed-off-by: Yakir Yang <ykk@rock-chips.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1 changed files with 3 additions and 3 deletions
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@ -135,9 +135,9 @@ static const struct dw_hdmi_curr_ctrl rockchip_cur_ctr[] = {
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static const struct dw_hdmi_phy_config rockchip_phy_config[] = {
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/*pixelclk symbol term vlev*/
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{ 74250000, 0x8009, 0x0004, 0x01ad},
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{ 148500000, 0x8029, 0x0004, 0x01ad},
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{ 297000000, 0x8039, 0x0005, 0x01ad},
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{ 74250000, 0x8009, 0x0004, 0x0272},
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{ 148500000, 0x802b, 0x0004, 0x028d},
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{ 297000000, 0x8039, 0x0005, 0x028d},
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{ ~0UL, 0x0000, 0x0000, 0x0000}
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};
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