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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-15 23:25:07 +00:00
rtlwifi: rtl8192se: Convert inline routines to little-endian words
In this step, the read/write routines for the descriptors are converted to use __le32 quantities, thus a lot of casts can be removed. Callback routines still use the 8-bit arrays, but these are changed within the specified routine. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
parent
06aae1b022
commit
1dce7eb373
2 changed files with 122 additions and 118 deletions
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@ -27,182 +27,182 @@
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/* macros to read/write various fields in RX or TX descriptors */
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/* Dword 0 */
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static inline void set_tx_desc_pkt_size(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_pkt_size(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(15, 0));
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le32p_replace_bits(__pdesc, __val, GENMASK(15, 0));
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}
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static inline void set_tx_desc_offset(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_offset(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(23, 16));
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le32p_replace_bits(__pdesc, __val, GENMASK(23, 16));
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}
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static inline void set_tx_desc_last_seg(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_last_seg(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, BIT(26));
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le32p_replace_bits(__pdesc, __val, BIT(26));
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}
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static inline void set_tx_desc_first_seg(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_first_seg(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, BIT(27));
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le32p_replace_bits(__pdesc, __val, BIT(27));
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}
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static inline void set_tx_desc_linip(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_linip(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, BIT(28));
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le32p_replace_bits(__pdesc, __val, BIT(28));
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}
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static inline void set_tx_desc_own(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_own(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31));
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le32p_replace_bits(__pdesc, __val, BIT(31));
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}
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static inline u32 get_tx_desc_own(u8 *__pdesc)
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static inline u32 get_tx_desc_own(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), BIT(31));
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return le32_get_bits(*(__pdesc), BIT(31));
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}
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/* Dword 1 */
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static inline void set_tx_desc_macid(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_macid(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(4, 0));
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le32p_replace_bits((__pdesc + 1), __val, GENMASK(4, 0));
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}
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static inline void set_tx_desc_queue_sel(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_queue_sel(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(12, 8));
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le32p_replace_bits((__pdesc + 1), __val, GENMASK(12, 8));
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}
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static inline void set_tx_desc_non_qos(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_non_qos(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 4), __val, BIT(16));
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le32p_replace_bits((__pdesc + 1), __val, BIT(16));
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}
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static inline void set_tx_desc_sec_type(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_sec_type(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 4), __val, GENMASK(23, 22));
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le32p_replace_bits((__pdesc + 1), __val, GENMASK(23, 22));
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}
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/* Dword 2 */
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static inline void set_tx_desc_rsvd_macid(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_rsvd_macid(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 8), __val, GENMASK(28, 24));
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le32p_replace_bits((__pdesc + 2), __val, GENMASK(28, 24));
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}
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static inline void set_tx_desc_agg_enable(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_agg_enable(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 8), __val, BIT(29));
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le32p_replace_bits((__pdesc + 2), __val, BIT(29));
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}
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/* Dword 3 */
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static inline void set_tx_desc_seq(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_seq(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 12), __val, GENMASK(27, 16));
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le32p_replace_bits((__pdesc + 3), __val, GENMASK(27, 16));
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}
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/* Dword 4 */
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static inline void set_tx_desc_rts_rate(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_rts_rate(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(5, 0));
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le32p_replace_bits((__pdesc + 4), __val, GENMASK(5, 0));
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}
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static inline void set_tx_desc_cts_enable(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_cts_enable(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, BIT(11));
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le32p_replace_bits((__pdesc + 4), __val, BIT(11));
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}
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static inline void set_tx_desc_rts_enable(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_rts_enable(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, BIT(12));
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le32p_replace_bits((__pdesc + 4), __val, BIT(12));
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}
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static inline void set_tx_desc_ra_brsr_id(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_ra_brsr_id(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(15, 13));
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le32p_replace_bits((__pdesc + 4), __val, GENMASK(15, 13));
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}
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static inline void set_tx_desc_txht(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_txht(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, BIT(16));
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le32p_replace_bits((__pdesc + 4), __val, BIT(16));
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}
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static inline void set_tx_desc_tx_short(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_tx_short(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, BIT(17));
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le32p_replace_bits((__pdesc + 4), __val, BIT(17));
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}
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static inline void set_tx_desc_tx_bandwidth(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_tx_bandwidth(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, BIT(18));
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le32p_replace_bits((__pdesc + 4), __val, BIT(18));
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}
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static inline void set_tx_desc_tx_sub_carrier(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_tx_sub_carrier(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(20, 19));
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le32p_replace_bits((__pdesc + 4), __val, GENMASK(20, 19));
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}
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static inline void set_tx_desc_rts_short(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_rts_short(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, BIT(25));
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le32p_replace_bits((__pdesc + 4), __val, BIT(25));
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}
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static inline void set_tx_desc_rts_bandwidth(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_rts_bandwidth(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, BIT(26));
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le32p_replace_bits((__pdesc + 4), __val, BIT(26));
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}
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static inline void set_tx_desc_rts_sub_carrier(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_rts_sub_carrier(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(28, 27));
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le32p_replace_bits((__pdesc + 4), __val, GENMASK(28, 27));
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}
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static inline void set_tx_desc_rts_stbc(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_rts_stbc(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, GENMASK(30, 29));
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le32p_replace_bits((__pdesc + 4), __val, GENMASK(30, 29));
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}
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static inline void set_tx_desc_user_rate(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_user_rate(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 16), __val, BIT(31));
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le32p_replace_bits((__pdesc + 4), __val, BIT(31));
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}
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/* Dword 5 */
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static inline void set_tx_desc_packet_id(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_packet_id(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(8, 0));
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le32p_replace_bits((__pdesc + 5), __val, GENMASK(8, 0));
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}
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static inline void set_tx_desc_tx_rate(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_tx_rate(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(14, 9));
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le32p_replace_bits((__pdesc + 5), __val, GENMASK(14, 9));
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}
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static inline void set_tx_desc_data_rate_fb_limit(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_data_rate_fb_limit(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 20), __val, GENMASK(20, 16));
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le32p_replace_bits((__pdesc + 5), __val, GENMASK(20, 16));
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}
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/* Dword 7 */
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static inline void set_tx_desc_tx_buffer_size(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_tx_buffer_size(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)(__pdesc + 28), __val, GENMASK(15, 0));
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le32p_replace_bits((__pdesc + 7), __val, GENMASK(15, 0));
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}
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/* Dword 8 */
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static inline void set_tx_desc_tx_buffer_address(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_tx_buffer_address(__le32 *__pdesc, u32 __val)
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{
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*(__le32 *)(__pdesc + 32) = cpu_to_le32(__val);
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*(__pdesc + 8) = cpu_to_le32(__val);
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}
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static inline u32 get_tx_desc_tx_buffer_address(u8 *__pdesc)
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static inline u32 get_tx_desc_tx_buffer_address(__le32 *__pdesc)
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{
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return le32_to_cpu(*((__le32 *)(__pdesc + 32)));
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return le32_to_cpu(*((__pdesc + 8)));
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}
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/* Dword 9 */
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static inline void set_tx_desc_next_desc_address(u8 *__pdesc, u32 __val)
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static inline void set_tx_desc_next_desc_address(__le32 *__pdesc, u32 __val)
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{
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*(__le32 *)(__pdesc + 36) = cpu_to_le32(__val);
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*(__pdesc + 9) = cpu_to_le32(__val);
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}
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/* Because the PCI Tx descriptors are chaied at the
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#define RX_DRV_INFO_SIZE_UNIT 8
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/* DWORD 0 */
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static inline void set_rx_status_desc_pkt_len(u8 *__pdesc, u32 __val)
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static inline void set_rx_status_desc_pkt_len(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, GENMASK(13, 0));
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le32p_replace_bits(__pdesc, __val, GENMASK(13, 0));
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}
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static inline void set_rx_status_desc_eor(u8 *__pdesc, u32 __val)
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static inline void set_rx_status_desc_eor(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, BIT(30));
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le32p_replace_bits(__pdesc, __val, BIT(30));
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}
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static inline void set_rx_status_desc_own(u8 *__pdesc, u32 __val)
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static inline void set_rx_status_desc_own(__le32 *__pdesc, u32 __val)
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{
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le32p_replace_bits((__le32 *)__pdesc, __val, BIT(31));
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le32p_replace_bits(__pdesc, __val, BIT(31));
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}
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static inline u32 get_rx_status_desc_pkt_len(u8 *__pdesc)
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static inline u32 get_rx_status_desc_pkt_len(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), GENMASK(13, 0));
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return le32_get_bits(*(__pdesc), GENMASK(13, 0));
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}
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static inline u32 get_rx_status_desc_crc32(u8 *__pdesc)
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static inline u32 get_rx_status_desc_crc32(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), BIT(14));
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return le32_get_bits(*(__pdesc), BIT(14));
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}
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static inline u32 get_rx_status_desc_icv(u8 *__pdesc)
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static inline u32 get_rx_status_desc_icv(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), BIT(15));
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return le32_get_bits(*(__pdesc), BIT(15));
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}
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static inline u32 get_rx_status_desc_drvinfo_size(u8 *__pdesc)
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static inline u32 get_rx_status_desc_drvinfo_size(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), GENMASK(19, 16));
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return le32_get_bits(*(__pdesc), GENMASK(19, 16));
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}
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static inline u32 get_rx_status_desc_shift(u8 *__pdesc)
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static inline u32 get_rx_status_desc_shift(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), GENMASK(25, 24));
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return le32_get_bits(*(__pdesc), GENMASK(25, 24));
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}
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static inline u32 get_rx_status_desc_phy_status(u8 *__pdesc)
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static inline u32 get_rx_status_desc_phy_status(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), BIT(26));
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return le32_get_bits(*(__pdesc), BIT(26));
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}
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static inline u32 get_rx_status_desc_swdec(u8 *__pdesc)
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static inline u32 get_rx_status_desc_swdec(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), BIT(27));
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return le32_get_bits(*(__pdesc), BIT(27));
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}
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static inline u32 get_rx_status_desc_own(u8 *__pdesc)
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static inline u32 get_rx_status_desc_own(__le32 *__pdesc)
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{
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return le32_get_bits(*((__le32 *)__pdesc), BIT(31));
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return le32_get_bits(*(__pdesc), BIT(31));
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}
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/* DWORD 1 */
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static inline u32 get_rx_status_desc_paggr(u8 *__pdesc)
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static inline u32 get_rx_status_desc_paggr(__le32 *__pdesc)
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{
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return le32_get_bits(*(__le32 *)(__pdesc + 4), BIT(14));
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return le32_get_bits(*(__pdesc + 1), BIT(14));
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}
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static inline u32 get_rx_status_desc_faggr(u8 *__pdesc)
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static inline u32 get_rx_status_desc_faggr(__le32 *__pdesc)
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{
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return le32_get_bits(*(__le32 *)(__pdesc + 4), BIT(15));
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return le32_get_bits(*(__pdesc + 1), BIT(15));
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}
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/* DWORD 3 */
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static inline u32 get_rx_status_desc_rx_mcs(u8 *__pdesc)
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static inline u32 get_rx_status_desc_rx_mcs(__le32 *__pdesc)
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{
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return le32_get_bits(*(__le32 *)(__pdesc + 12), GENMASK(5, 0));
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return le32_get_bits(*(__pdesc + 3), GENMASK(5, 0));
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}
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static inline u32 get_rx_status_desc_rx_ht(u8 *__pdesc)
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static inline u32 get_rx_status_desc_rx_ht(__le32 *__pdesc)
|
||||
{
|
||||
return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(6));
|
||||
return le32_get_bits(*(__pdesc + 3), BIT(6));
|
||||
}
|
||||
|
||||
static inline u32 get_rx_status_desc_splcp(u8 *__pdesc)
|
||||
static inline u32 get_rx_status_desc_splcp(__le32 *__pdesc)
|
||||
{
|
||||
return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(8));
|
||||
return le32_get_bits(*(__pdesc + 3), BIT(8));
|
||||
}
|
||||
|
||||
static inline u32 get_rx_status_desc_bw(u8 *__pdesc)
|
||||
static inline u32 get_rx_status_desc_bw(__le32 *__pdesc)
|
||||
{
|
||||
return le32_get_bits(*(__le32 *)(__pdesc + 12), BIT(9));
|
||||
return le32_get_bits(*(__pdesc + 3), BIT(9));
|
||||
}
|
||||
|
||||
/* DWORD 5 */
|
||||
static inline u32 get_rx_status_desc_tsfl(u8 *__pdesc)
|
||||
static inline u32 get_rx_status_desc_tsfl(__le32 *__pdesc)
|
||||
{
|
||||
return le32_to_cpu(*((__le32 *)(__pdesc + 20)));
|
||||
return le32_to_cpu(*((__pdesc + 5)));
|
||||
}
|
||||
|
||||
/* DWORD 6 */
|
||||
static inline void set_rx_status__desc_buff_addr(u8 *__pdesc, u32 __val)
|
||||
static inline void set_rx_status__desc_buff_addr(__le32 *__pdesc, u32 __val)
|
||||
{
|
||||
*(__le32 *)(__pdesc + 24) = cpu_to_le32(__val);
|
||||
*(__pdesc + 6) = cpu_to_le32(__val);
|
||||
}
|
||||
|
||||
static inline u32 get_rx_status_desc_buff_addr(u8 *__pdesc)
|
||||
static inline u32 get_rx_status_desc_buff_addr(__le32 *__pdesc)
|
||||
{
|
||||
return le32_to_cpu(*(__le32 *)(__pdesc + 24));
|
||||
return le32_to_cpu(*(__pdesc + 6));
|
||||
}
|
||||
|
||||
#define SE_RX_HAL_IS_CCK_RATE(_pdesc)\
|
||||
|
|
|
@ -33,7 +33,7 @@ static u8 _rtl92se_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 skb_queue)
|
|||
}
|
||||
|
||||
static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
|
||||
struct rtl_stats *pstats, u8 *pdesc,
|
||||
struct rtl_stats *pstats, __le32 *pdesc,
|
||||
struct rx_fwinfo *p_drvinfo,
|
||||
bool packet_match_bssid,
|
||||
bool packet_toself,
|
||||
|
@ -193,11 +193,10 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
|
|||
|
||||
static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
|
||||
struct sk_buff *skb, struct rtl_stats *pstats,
|
||||
u8 *pdesc, struct rx_fwinfo *p_drvinfo)
|
||||
__le32 *pdesc, struct rx_fwinfo *p_drvinfo)
|
||||
{
|
||||
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
|
||||
struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
|
||||
|
||||
struct ieee80211_hdr *hdr;
|
||||
u8 *tmp_buf;
|
||||
u8 *praddr;
|
||||
|
@ -232,10 +231,11 @@ static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
|
|||
}
|
||||
|
||||
bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
|
||||
struct ieee80211_rx_status *rx_status, u8 *pdesc,
|
||||
struct ieee80211_rx_status *rx_status, u8 *pdesc8,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct rx_fwinfo *p_drvinfo;
|
||||
__le32 *pdesc = (__le32 *)pdesc8;
|
||||
u32 phystatus = (u32)get_rx_status_desc_phy_status(pdesc);
|
||||
struct ieee80211_hdr *hdr;
|
||||
|
||||
|
@ -310,7 +310,7 @@ bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
|
|||
}
|
||||
|
||||
void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
|
||||
struct ieee80211_hdr *hdr, u8 *pdesc_tx,
|
||||
struct ieee80211_hdr *hdr, u8 *pdesc8,
|
||||
u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
|
||||
struct ieee80211_sta *sta,
|
||||
struct sk_buff *skb,
|
||||
|
@ -320,7 +320,7 @@ void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
|
|||
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
|
||||
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
||||
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
|
||||
u8 *pdesc = pdesc_tx;
|
||||
__le32 *pdesc = (__le32 *)pdesc8;
|
||||
u16 seq_number;
|
||||
__le16 fc = hdr->frame_control;
|
||||
u8 reserved_macid = 0;
|
||||
|
@ -491,13 +491,14 @@ void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
|
|||
RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
|
||||
}
|
||||
|
||||
void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
|
||||
bool firstseg, bool lastseg, struct sk_buff *skb)
|
||||
void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc8,
|
||||
bool firstseg, bool lastseg, struct sk_buff *skb)
|
||||
{
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
|
||||
struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
|
||||
struct rtl_tcb_desc *tcb_desc = (struct rtl_tcb_desc *)(skb->cb);
|
||||
__le32 *pdesc = (__le32 *)pdesc8;
|
||||
|
||||
dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
|
||||
PCI_DMA_TODEVICE);
|
||||
|
@ -549,9 +550,11 @@ void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
|
|||
}
|
||||
}
|
||||
|
||||
void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
||||
void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc8, bool istx,
|
||||
u8 desc_name, u8 *val)
|
||||
{
|
||||
__le32 *pdesc = (__le32 *)pdesc8;
|
||||
|
||||
if (istx) {
|
||||
switch (desc_name) {
|
||||
case HW_DESC_OWN:
|
||||
|
@ -590,9 +593,10 @@ void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
|
|||
}
|
||||
|
||||
u64 rtl92se_get_desc(struct ieee80211_hw *hw,
|
||||
u8 *desc, bool istx, u8 desc_name)
|
||||
u8 *desc8, bool istx, u8 desc_name)
|
||||
{
|
||||
u32 ret = 0;
|
||||
__le32 *desc = (__le32 *)desc8;
|
||||
|
||||
if (istx) {
|
||||
switch (desc_name) {
|
||||
|
|
Loading…
Reference in a new issue