mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-03 07:38:10 +00:00
spi/pxa2xx: enable DMA on newer Intel LPSS silicon
There is an additional bit in the Intel LPSS SPI private registers that needs to be set in order to be able to use DMA with the SPI controller. Enable this as well. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
parent
ad81f0545e
commit
1de7061253
1 changed files with 8 additions and 1 deletions
|
@ -69,6 +69,8 @@ MODULE_ALIAS("platform:pxa2xx-spi");
|
||||||
#define LPSS_TX_HITHRESH_DFLT 224
|
#define LPSS_TX_HITHRESH_DFLT 224
|
||||||
|
|
||||||
/* Offset from drv_data->lpss_base */
|
/* Offset from drv_data->lpss_base */
|
||||||
|
#define GENERAL_REG 0x08
|
||||||
|
#define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24)
|
||||||
#define SSP_REG 0x0c
|
#define SSP_REG 0x0c
|
||||||
#define SPI_CS_CONTROL 0x18
|
#define SPI_CS_CONTROL 0x18
|
||||||
#define SPI_CS_CONTROL_SW_MODE BIT(0)
|
#define SPI_CS_CONTROL_SW_MODE BIT(0)
|
||||||
|
@ -142,8 +144,13 @@ static void lpss_ssp_setup(struct driver_data *drv_data)
|
||||||
__lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value);
|
__lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value);
|
||||||
|
|
||||||
/* Enable multiblock DMA transfers */
|
/* Enable multiblock DMA transfers */
|
||||||
if (drv_data->master_info->enable_dma)
|
if (drv_data->master_info->enable_dma) {
|
||||||
__lpss_ssp_write_priv(drv_data, SSP_REG, 1);
|
__lpss_ssp_write_priv(drv_data, SSP_REG, 1);
|
||||||
|
|
||||||
|
value = __lpss_ssp_read_priv(drv_data, GENERAL_REG);
|
||||||
|
value |= GENERAL_REG_RXTO_HOLDOFF_DISABLE;
|
||||||
|
__lpss_ssp_write_priv(drv_data, GENERAL_REG, value);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable)
|
static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable)
|
||||||
|
|
Loading…
Reference in a new issue