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GPIO: gpio-dwapb: Suspend & Resume PM enabling
This patch enables suspend and resume mode for the power management, and it is based on Josef Ahmad's previous work. Reviewed-by: Hock Leong Kweh <hock.leong.kweh@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Weike Chen <alvin.chen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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1 changed files with 115 additions and 0 deletions
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@ -51,10 +51,28 @@
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struct dwapb_gpio;
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#ifdef CONFIG_PM_SLEEP
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/* Store GPIO context across system-wide suspend/resume transitions */
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struct dwapb_context {
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u32 data;
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u32 dir;
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u32 ext;
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u32 int_en;
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u32 int_mask;
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u32 int_type;
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u32 int_pol;
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u32 int_deb;
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};
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#endif
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struct dwapb_gpio_port {
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struct bgpio_chip bgc;
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bool is_registered;
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struct dwapb_gpio *gpio;
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#ifdef CONFIG_PM_SLEEP
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struct dwapb_context *ctx;
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#endif
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unsigned int idx;
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};
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struct dwapb_gpio {
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@ -381,6 +399,13 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
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port = &gpio->ports[offs];
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port->gpio = gpio;
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port->idx = pp->idx;
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#ifdef CONFIG_PM_SLEEP
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port->ctx = devm_kzalloc(gpio->dev, sizeof(*port->ctx), GFP_KERNEL);
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if (!port->ctx)
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return -ENOMEM;
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#endif
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dat = gpio->regs + GPIO_EXT_PORTA + (pp->idx * GPIO_EXT_PORT_SIZE);
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set = gpio->regs + GPIO_SWPORTA_DR + (pp->idx * GPIO_SWPORT_DR_SIZE);
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@ -586,10 +611,100 @@ static const struct of_device_id dwapb_of_match[] = {
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};
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MODULE_DEVICE_TABLE(of, dwapb_of_match);
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#ifdef CONFIG_PM_SLEEP
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static int dwapb_gpio_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
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struct bgpio_chip *bgc = &gpio->ports[0].bgc;
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unsigned long flags;
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int i;
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spin_lock_irqsave(&bgc->lock, flags);
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for (i = 0; i < gpio->nr_ports; i++) {
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unsigned int offset;
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unsigned int idx = gpio->ports[i].idx;
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struct dwapb_context *ctx = gpio->ports[i].ctx;
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BUG_ON(ctx == 0);
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offset = GPIO_SWPORTA_DDR + idx * GPIO_SWPORT_DDR_SIZE;
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ctx->dir = dwapb_read(gpio, offset);
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offset = GPIO_SWPORTA_DR + idx * GPIO_SWPORT_DR_SIZE;
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ctx->data = dwapb_read(gpio, offset);
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offset = GPIO_EXT_PORTA + idx * GPIO_EXT_PORT_SIZE;
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ctx->ext = dwapb_read(gpio, offset);
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/* Only port A can provide interrupts */
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if (idx == 0) {
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ctx->int_mask = dwapb_read(gpio, GPIO_INTMASK);
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ctx->int_en = dwapb_read(gpio, GPIO_INTEN);
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ctx->int_pol = dwapb_read(gpio, GPIO_INT_POLARITY);
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ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
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ctx->int_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
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/* Mask out interrupts */
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dwapb_write(gpio, GPIO_INTMASK, 0xffffffff);
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}
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}
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spin_unlock_irqrestore(&bgc->lock, flags);
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return 0;
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}
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static int dwapb_gpio_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
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struct bgpio_chip *bgc = &gpio->ports[0].bgc;
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unsigned long flags;
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int i;
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spin_lock_irqsave(&bgc->lock, flags);
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for (i = 0; i < gpio->nr_ports; i++) {
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unsigned int offset;
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unsigned int idx = gpio->ports[i].idx;
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struct dwapb_context *ctx = gpio->ports[i].ctx;
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BUG_ON(ctx == 0);
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offset = GPIO_SWPORTA_DR + idx * GPIO_SWPORT_DR_SIZE;
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dwapb_write(gpio, offset, ctx->data);
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offset = GPIO_SWPORTA_DDR + idx * GPIO_SWPORT_DDR_SIZE;
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dwapb_write(gpio, offset, ctx->dir);
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offset = GPIO_EXT_PORTA + idx * GPIO_EXT_PORT_SIZE;
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dwapb_write(gpio, offset, ctx->ext);
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/* Only port A can provide interrupts */
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if (idx == 0) {
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dwapb_write(gpio, GPIO_INTTYPE_LEVEL, ctx->int_type);
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dwapb_write(gpio, GPIO_INT_POLARITY, ctx->int_pol);
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dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, ctx->int_deb);
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dwapb_write(gpio, GPIO_INTEN, ctx->int_en);
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dwapb_write(gpio, GPIO_INTMASK, ctx->int_mask);
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/* Clear out spurious interrupts */
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dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff);
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}
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}
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spin_unlock_irqrestore(&bgc->lock, flags);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, dwapb_gpio_suspend,
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dwapb_gpio_resume);
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static struct platform_driver dwapb_gpio_driver = {
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.driver = {
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.name = "gpio-dwapb",
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.owner = THIS_MODULE,
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.pm = &dwapb_gpio_pm_ops,
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.of_match_table = of_match_ptr(dwapb_of_match),
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},
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.probe = dwapb_gpio_probe,
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