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dmaengine: Add Freescale i.MX SDMA support
This patch adds support for the Freescale i.MX SDMA engine. The SDMA engine is a scatter/gather DMA engine which is implemented as a seperate coprocessor. SDMA needs its own firmware which is requested using the standard request_firmware mechanism. The firmware has different entry points for each peripheral type, so drivers have to pass the peripheral type to the DMA engine which in turn picks the correct firmware entry point from a table contained in the firmware image itself. The original Freescale code also supports support for transfering data to the internal SRAM which needs different entry points to the firmware. Support for this is currently not implemented. Also, support for the ASRC (asymmetric sample rate converter) is skipped. I took a very simple approach to implement dmaengine support. Only a single descriptor is statically assigned to a each channel. This means that transfers can't be queued up but only a single transfer is in progress. This simplifies implementation a lot and is sufficient for the usual device/memory transfers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Linus Walleij <linus.ml.walleij@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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6 changed files with 1487 additions and 6 deletions
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@ -27,6 +27,8 @@
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#define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
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#include <mach/dma.h>
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#define IMX_DMA_CHANNELS 16
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#define DMA_MODE_READ 0
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@ -96,12 +98,6 @@ int imx_dma_request(int channel, const char *name);
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void imx_dma_free(int channel);
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enum imx_dma_prio {
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DMA_PRIO_HIGH = 0,
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DMA_PRIO_MEDIUM = 1,
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DMA_PRIO_LOW = 2
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};
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int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
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#endif /* __MACH_DMA_V1_H__ */
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67
arch/arm/plat-mxc/include/mach/dma.h
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67
arch/arm/plat-mxc/include/mach/dma.h
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/*
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* Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_DMA_H__
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#define __ASM_ARCH_MXC_DMA_H__
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#include <linux/scatterlist.h>
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#include <linux/device.h>
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#include <linux/dmaengine.h>
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/*
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* This enumerates peripheral types. Used for SDMA.
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*/
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enum sdma_peripheral_type {
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IMX_DMATYPE_SSI, /* MCU domain SSI */
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IMX_DMATYPE_SSI_SP, /* Shared SSI */
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IMX_DMATYPE_MMC, /* MMC */
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IMX_DMATYPE_SDHC, /* SDHC */
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IMX_DMATYPE_UART, /* MCU domain UART */
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IMX_DMATYPE_UART_SP, /* Shared UART */
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IMX_DMATYPE_FIRI, /* FIRI */
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IMX_DMATYPE_CSPI, /* MCU domain CSPI */
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IMX_DMATYPE_CSPI_SP, /* Shared CSPI */
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IMX_DMATYPE_SIM, /* SIM */
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IMX_DMATYPE_ATA, /* ATA */
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IMX_DMATYPE_CCM, /* CCM */
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IMX_DMATYPE_EXT, /* External peripheral */
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IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */
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IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */
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IMX_DMATYPE_DSP, /* DSP */
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IMX_DMATYPE_MEMORY, /* Memory */
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IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */
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IMX_DMATYPE_SPDIF, /* SPDIF */
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IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */
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IMX_DMATYPE_ASRC, /* ASRC */
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IMX_DMATYPE_ESAI, /* ESAI */
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};
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enum imx_dma_prio {
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DMA_PRIO_HIGH = 0,
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DMA_PRIO_MEDIUM = 1,
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DMA_PRIO_LOW = 2
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};
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struct imx_dma_data {
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int dma_request; /* DMA request line */
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enum sdma_peripheral_type peripheral_type;
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int priority;
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};
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static inline int imx_dma_is_ipu(struct dma_chan *chan)
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{
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return !strcmp(dev_name(chan->device->dev), "ipu-core");
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}
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static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
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{
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return !strcmp(dev_name(chan->device->dev), "imx-sdma") ||
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!strcmp(dev_name(chan->device->dev), "imx-dma");
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}
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#endif
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17
arch/arm/plat-mxc/include/mach/sdma.h
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17
arch/arm/plat-mxc/include/mach/sdma.h
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@ -0,0 +1,17 @@
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#ifndef __MACH_MXC_SDMA_H__
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#define __MACH_MXC_SDMA_H__
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/**
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* struct sdma_platform_data - platform specific data for SDMA engine
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*
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* @sdma_version The version of this SDMA engine
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* @cpu_name used to generate the firmware name
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* @to_version CPU Tape out version
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*/
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struct sdma_platform_data {
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int sdma_version;
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char *cpu_name;
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int to_version;
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};
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#endif /* __MACH_MXC_SDMA_H__ */
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@ -195,6 +195,14 @@ config PCH_DMA
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help
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Enable support for the Topcliff PCH DMA engine.
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config IMX_SDMA
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tristate "i.MX SDMA support"
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depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5
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select DMA_ENGINE
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help
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Support the i.MX SDMA engine. This engine is integrated into
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Freescale i.MX25/31/35/51 chips.
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config DMA_ENGINE
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bool
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@ -21,6 +21,7 @@ obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
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obj-$(CONFIG_SH_DMAE) += shdma.o
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obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
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obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/
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obj-$(CONFIG_IMX_SDMA) += imx-sdma.o
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obj-$(CONFIG_TIMB_DMA) += timb_dma.o
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obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o
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obj-$(CONFIG_PL330_DMA) += pl330.o
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1392
drivers/dma/imx-sdma.c
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1392
drivers/dma/imx-sdma.c
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