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arm64: __clean_dcache_area_poc to take end parameter instead of size
To be consistent with other functions with similar names and functionality in cacheflush.h, cache.S, and cachetlb.rst, change to specify the range in terms of start and end, as opposed to start and size. Because the code is shared with __dma_clean_area, it changes the parameters for that as well. However, __dma_clean_area is local to cache.S, so no other users are affected. No functional change intended. Reported-by: Will Deacon <will@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Fuad Tabba <tabba@google.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20210524083001.2586635-14-tabba@google.com Signed-off-by: Will Deacon <will@kernel.org>
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814b186079
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1f42faf1d2
3 changed files with 11 additions and 12 deletions
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@ -60,7 +60,7 @@ extern void __flush_icache_range(unsigned long start, unsigned long end);
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extern void invalidate_icache_range(unsigned long start, unsigned long end);
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extern void __flush_dcache_area(unsigned long start, unsigned long end);
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extern void __inval_dcache_area(unsigned long start, unsigned long end);
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extern void __clean_dcache_area_poc(void *addr, size_t len);
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extern void __clean_dcache_area_poc(unsigned long start, unsigned long end);
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extern void __clean_dcache_area_pop(void *addr, size_t len);
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extern void __clean_dcache_area_pou(void *addr, size_t len);
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extern long __flush_cache_user_range(unsigned long start, unsigned long end);
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@ -28,6 +28,7 @@ SYM_CODE_START(efi_enter_kernel)
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* stale icache entries from before relocation.
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*/
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ldr w1, =kernel_size
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add x1, x0, x1
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bl __clean_dcache_area_poc
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ic ialluis
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@ -36,7 +37,7 @@ SYM_CODE_START(efi_enter_kernel)
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* so that we can safely disable the MMU and caches.
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*/
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adr x0, 0f
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ldr w1, 3f
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adr x1, 3f
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bl __clean_dcache_area_poc
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0:
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/* Turn off Dcache and MMU */
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@ -64,5 +65,5 @@ SYM_CODE_START(efi_enter_kernel)
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mov x2, xzr
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mov x3, xzr
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br x19
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3:
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SYM_CODE_END(efi_enter_kernel)
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3: .long . - 0b
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@ -171,24 +171,23 @@ SYM_FUNC_END_PI(__inval_dcache_area)
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SYM_FUNC_END(__dma_inv_area)
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/*
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* __clean_dcache_area_poc(kaddr, size)
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* __clean_dcache_area_poc(start, end)
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*
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* Ensure that any D-cache lines for the interval [kaddr, kaddr+size)
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* Ensure that any D-cache lines for the interval [start, end)
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* are cleaned to the PoC.
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*
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* - kaddr - kernel address
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* - size - size in question
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* - start - virtual start address of region
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* - end - virtual end address of region
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*/
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SYM_FUNC_START_LOCAL(__dma_clean_area)
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SYM_FUNC_START_PI(__clean_dcache_area_poc)
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/* FALLTHROUGH */
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/*
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* __dma_clean_area(start, size)
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* __dma_clean_area(start, end)
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* - start - virtual start address of region
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* - size - size in question
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* - end - virtual end address of region
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*/
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add x1, x0, x1
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dcache_by_line_op cvac, sy, x0, x1, x2, x3
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ret
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SYM_FUNC_END_PI(__clean_dcache_area_poc)
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@ -204,10 +203,10 @@ SYM_FUNC_END(__dma_clean_area)
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* - size - size in question
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*/
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SYM_FUNC_START_PI(__clean_dcache_area_pop)
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add x1, x0, x1
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alternative_if_not ARM64_HAS_DCPOP
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b __clean_dcache_area_poc
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alternative_else_nop_endif
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add x1, x0, x1
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dcache_by_line_op cvap, sy, x0, x1, x2, x3
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ret
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SYM_FUNC_END_PI(__clean_dcache_area_pop)
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@ -236,7 +235,6 @@ SYM_FUNC_START_PI(__dma_map_area)
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add x1, x0, x1
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cmp w2, #DMA_FROM_DEVICE
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b.eq __dma_inv_area
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sub x1, x1, x0
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b __dma_clean_area
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SYM_FUNC_END_PI(__dma_map_area)
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