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KVM: MIPS/VZ: Handle Octeon III guest.PRid register
Octeon III implements a read-only guest CP0_PRid register, so add cases to the KVM register access API for Octeon to ensure the correct value is read and writes are ignored. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Daney <david.daney@cavium.com> Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org
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commit
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2 changed files with 19 additions and 2 deletions
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@ -2025,6 +2025,8 @@ do { \
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#define read_gc0_epc() __read_ulong_gc0_register(14, 0)
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#define write_gc0_epc(val) __write_ulong_gc0_register(14, 0, val)
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#define read_gc0_prid() __read_32bit_gc0_register(15, 0)
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#define read_gc0_ebase() __read_32bit_gc0_register(15, 1)
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#define write_gc0_ebase(val) __write_32bit_gc0_register(15, 1, val)
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@ -1938,7 +1938,15 @@ static int kvm_vz_get_one_reg(struct kvm_vcpu *vcpu,
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*v = (long)read_gc0_epc();
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break;
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case KVM_REG_MIPS_CP0_PRID:
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*v = (long)kvm_read_c0_guest_prid(cop0);
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switch (boot_cpu_type()) {
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case CPU_CAVIUM_OCTEON3:
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/* Octeon III has a read-only guest.PRid */
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*v = read_gc0_prid();
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break;
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default:
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*v = (long)kvm_read_c0_guest_prid(cop0);
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break;
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};
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break;
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case KVM_REG_MIPS_CP0_EBASE:
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*v = kvm_vz_read_gc0_ebase();
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@ -2170,7 +2178,14 @@ static int kvm_vz_set_one_reg(struct kvm_vcpu *vcpu,
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write_gc0_epc(v);
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break;
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case KVM_REG_MIPS_CP0_PRID:
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kvm_write_c0_guest_prid(cop0, v);
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switch (boot_cpu_type()) {
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case CPU_CAVIUM_OCTEON3:
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/* Octeon III has a guest.PRid, but its read-only */
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break;
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default:
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kvm_write_c0_guest_prid(cop0, v);
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break;
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};
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break;
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case KVM_REG_MIPS_CP0_EBASE:
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kvm_vz_write_gc0_ebase(v);
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