soc: mediatek: svs: Add support for MT8188 SoC

MT8188 svs gpu uses 2-line high bank and low bank to optimize the
voltage of opp table for higher and lower frequency respectively.

Signed-off-by: Mark Tseng <chun-jen.tseng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230921052637.30444-3-chun-jen.tseng@mediatek.com
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Mark Tseng 2023-09-21 13:26:36 +08:00 committed by AngeloGioacchino Del Regno
parent 6b841f34d5
commit 1f6c9cbc49
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GPG Key ID: 9A3604CFAD978478
1 changed files with 127 additions and 0 deletions

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@ -1808,6 +1808,66 @@ static bool svs_mt8192_efuse_parsing(struct svs_platform *svsp)
return true;
}
static bool svs_mt8188_efuse_parsing(struct svs_platform *svsp)
{
struct svs_bank *svsb;
u32 idx, i, golden_temp;
int ret;
for (i = 0; i < svsp->efuse_max; i++)
if (svsp->efuse[i])
dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n",
i, svsp->efuse[i]);
if (!svsp->efuse[5]) {
dev_notice(svsp->dev, "svs_efuse[5] = 0x0?\n");
return false;
}
/* Svs efuse parsing */
for (idx = 0; idx < svsp->bank_max; idx++) {
svsb = &svsp->banks[idx];
if (svsb->type == SVSB_LOW) {
svsb->mtdes = svsp->efuse[5] & GENMASK(7, 0);
svsb->bdes = (svsp->efuse[5] >> 16) & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[5] >> 24) & GENMASK(7, 0);
svsb->dcbdet = (svsp->efuse[15] >> 16) & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[15] >> 24) & GENMASK(7, 0);
} else if (svsb->type == SVSB_HIGH) {
svsb->mtdes = svsp->efuse[4] & GENMASK(7, 0);
svsb->bdes = (svsp->efuse[4] >> 16) & GENMASK(7, 0);
svsb->mdes = (svsp->efuse[4] >> 24) & GENMASK(7, 0);
svsb->dcbdet = svsp->efuse[14] & GENMASK(7, 0);
svsb->dcmdet = (svsp->efuse[14] >> 8) & GENMASK(7, 0);
}
svsb->vmax += svsb->dvt_fixed;
}
ret = svs_get_efuse_data(svsp, "t-calibration-data",
&svsp->tefuse, &svsp->tefuse_max);
if (ret)
return false;
for (i = 0; i < svsp->tefuse_max; i++)
if (svsp->tefuse[i] != 0)
break;
if (i == svsp->tefuse_max)
golden_temp = 50; /* All thermal efuse data are 0 */
else
golden_temp = (svsp->tefuse[0] >> 24) & GENMASK(7, 0);
for (idx = 0; idx < svsp->bank_max; idx++) {
svsb = &svsp->banks[idx];
svsb->mts = 500;
svsb->bts = (((500 * golden_temp + 250460) / 1000) - 25) * 4;
}
return true;
}
static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp)
{
struct svs_bank *svsb;
@ -2173,6 +2233,61 @@ static struct svs_bank svs_mt8192_banks[] = {
},
};
static struct svs_bank svs_mt8188_banks[] = {
{
.sw_id = SVSB_GPU,
.type = SVSB_LOW,
.set_freq_pct = svs_set_bank_freq_pct_v3,
.get_volts = svs_get_bank_volts_v3,
.volt_flags = SVSB_REMOVE_DVTFIXED_VOLT,
.mode_support = SVSB_MODE_INIT02,
.opp_count = MAX_OPP_ENTRIES,
.freq_base = 640000000,
.turn_freq_base = 640000000,
.volt_step = 6250,
.volt_base = 400000,
.vmax = 0x38,
.vmin = 0x1c,
.age_config = 0x555555,
.dc_config = 0x555555,
.dvt_fixed = 0x1,
.vco = 0x10,
.chk_shift = 0x87,
.core_sel = 0x0fff0000,
.int_st = BIT(0),
.ctl0 = 0x00100003,
},
{
.sw_id = SVSB_GPU,
.type = SVSB_HIGH,
.set_freq_pct = svs_set_bank_freq_pct_v3,
.get_volts = svs_get_bank_volts_v3,
.tzone_name = "gpu1",
.volt_flags = SVSB_REMOVE_DVTFIXED_VOLT |
SVSB_MON_VOLT_IGNORE,
.mode_support = SVSB_MODE_INIT02 | SVSB_MODE_MON,
.opp_count = MAX_OPP_ENTRIES,
.freq_base = 880000000,
.turn_freq_base = 640000000,
.volt_step = 6250,
.volt_base = 400000,
.vmax = 0x38,
.vmin = 0x1c,
.age_config = 0x555555,
.dc_config = 0x555555,
.dvt_fixed = 0x4,
.vco = 0x10,
.chk_shift = 0x87,
.core_sel = 0x0fff0001,
.int_st = BIT(1),
.ctl0 = 0x00100003,
.tzone_htemp = 85000,
.tzone_htemp_voffset = 0,
.tzone_ltemp = 25000,
.tzone_ltemp_voffset = 7,
},
};
static struct svs_bank svs_mt8183_banks[] = {
{
.sw_id = SVSB_CPU_LITTLE,
@ -2286,6 +2401,15 @@ static const struct svs_platform_data svs_mt8192_platform_data = {
.bank_max = ARRAY_SIZE(svs_mt8192_banks),
};
static const struct svs_platform_data svs_mt8188_platform_data = {
.name = "mt8188-svs",
.banks = svs_mt8188_banks,
.efuse_parsing = svs_mt8188_efuse_parsing,
.probe = svs_mt8192_platform_probe,
.regs = svs_regs_v2,
.bank_max = ARRAY_SIZE(svs_mt8188_banks),
};
static const struct svs_platform_data svs_mt8183_platform_data = {
.name = "mt8183-svs",
.banks = svs_mt8183_banks,
@ -2299,6 +2423,9 @@ static const struct of_device_id svs_of_match[] = {
{
.compatible = "mediatek,mt8192-svs",
.data = &svs_mt8192_platform_data,
}, {
.compatible = "mediatek,mt8188-svs",
.data = &svs_mt8188_platform_data,
}, {
.compatible = "mediatek,mt8183-svs",
.data = &svs_mt8183_platform_data,