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Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cpu feature fixes from Ingo Molnar:
 "Two small cpufeature support updates"

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86: Fix override new_cpu_data.x86 with 486
  x86, cpufeature: Use new CC_HAVE_ASM_GOTO
This commit is contained in:
Linus Torvalds 2013-09-04 09:11:16 -07:00
parent 9cb87aaf40 237d154854
commit 1f9c52e16b
2 changed files with 12 additions and 7 deletions
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17
arch/x86/include/asm/cpufeature.h
View File

@ -366,9 +366,10 @@ extern bool __static_cpu_has_safe(u16 bit);
*/ */
static __always_inline __pure bool __static_cpu_has(u16 bit) static __always_inline __pure bool __static_cpu_has(u16 bit)
{ {
#if __GNUC__ > 4 || __GNUC_MINOR__ >= 5 #ifdef CC_HAVE_ASM_GOTO
#ifdef CONFIG_X86_DEBUG_STATIC_CPU_HAS #ifdef CONFIG_X86_DEBUG_STATIC_CPU_HAS
/* /*
* Catch too early usage of this before alternatives * Catch too early usage of this before alternatives
* have run. * have run.
@ -384,6 +385,7 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
".previous\n" ".previous\n"
/* skipping size check since replacement size = 0 */ /* skipping size check since replacement size = 0 */
: : "i" (X86_FEATURE_ALWAYS) : : t_warn); : : "i" (X86_FEATURE_ALWAYS) : : t_warn);
#endif #endif
asm goto("1: jmp %l[t_no]\n" asm goto("1: jmp %l[t_no]\n"
@ -406,7 +408,9 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
warn_pre_alternatives(); warn_pre_alternatives();
return false; return false;
#endif #endif
#else /* GCC_VERSION >= 40500 */
#else /* CC_HAVE_ASM_GOTO */
u8 flag; u8 flag;
/* Open-coded due to __stringify() in ALTERNATIVE() */ /* Open-coded due to __stringify() in ALTERNATIVE() */
asm volatile("1: movb $0,%0\n" asm volatile("1: movb $0,%0\n"
@ -427,7 +431,8 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
".previous\n" ".previous\n"
: "=qm" (flag) : "i" (bit)); : "=qm" (flag) : "i" (bit));
return flag; return flag;
#endif
#endif /* CC_HAVE_ASM_GOTO */
} }
#define static_cpu_has(bit) \ #define static_cpu_has(bit) \
@ -441,7 +446,7 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
static __always_inline __pure bool _static_cpu_has_safe(u16 bit) static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
{ {
#if __GNUC__ > 4 || __GNUC_MINOR__ >= 5 #ifdef CC_HAVE_ASM_GOTO
/* /*
* We need to spell the jumps to the compiler because, depending on the offset, * We need to spell the jumps to the compiler because, depending on the offset,
* the replacement jump can be bigger than the original jump, and this we cannot * the replacement jump can be bigger than the original jump, and this we cannot
@ -475,7 +480,7 @@ static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
return false; return false;
t_dynamic: t_dynamic:
return __static_cpu_has_safe(bit); return __static_cpu_has_safe(bit);
#else /* GCC_VERSION >= 40500 */ #else
u8 flag; u8 flag;
/* Open-coded due to __stringify() in ALTERNATIVE() */ /* Open-coded due to __stringify() in ALTERNATIVE() */
asm volatile("1: movb $2,%0\n" asm volatile("1: movb $2,%0\n"
@ -511,7 +516,7 @@ static __always_inline __pure bool _static_cpu_has_safe(u16 bit)
: "=qm" (flag) : "=qm" (flag)
: "i" (bit), "i" (X86_FEATURE_ALWAYS)); : "i" (bit), "i" (X86_FEATURE_ALWAYS));
return (flag == 2 ? __static_cpu_has_safe(bit) : flag); return (flag == 2 ? __static_cpu_has_safe(bit) : flag);
#endif #endif /* CC_HAVE_ASM_GOTO */
} }
#define static_cpu_has_safe(bit) \ #define static_cpu_has_safe(bit) \

2
arch/x86/kernel/head_32.S
View File

@ -409,6 +409,7 @@ enable_paging:
/* /*
* Check if it is 486 * Check if it is 486
*/ */
movb $4,X86 # at least 486
cmpl $-1,X86_CPUID cmpl $-1,X86_CPUID
je is486 je is486
@ -436,7 +437,6 @@ enable_paging:
movl %edx,X86_CAPABILITY movl %edx,X86_CAPABILITY
is486: is486:
movb $4,X86
movl $0x50022,%ecx # set AM, WP, NE and MP movl $0x50022,%ecx # set AM, WP, NE and MP
movl %cr0,%eax movl %cr0,%eax
andl $0x80000011,%eax # Save PG,PE,ET andl $0x80000011,%eax # Save PG,PE,ET