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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-30 08:02:30 +00:00
ASoC: q6dsp: q6afe-dai: add support to Codec DMA ports
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20200910101732.23484-9-srinivas.kandagatla@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
0c3e35fc1e
commit
1fdbcfa9fd
1 changed files with 229 additions and 0 deletions
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@ -55,6 +55,48 @@
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.remove = msm_dai_q6_dai_remove, \
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}
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#define Q6AFE_CDC_DMA_RX_DAI(did) { \
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.playback = { \
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.stream_name = #did" Playback", \
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.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
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SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
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SNDRV_PCM_RATE_176400, \
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.formats = SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE, \
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.channels_min = 1, \
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.channels_max = 8, \
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.rate_min = 8000, \
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.rate_max = 176400, \
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}, \
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.name = #did, \
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.ops = &q6dma_ops, \
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.id = did, \
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.probe = msm_dai_q6_dai_probe, \
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.remove = msm_dai_q6_dai_remove, \
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}
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#define Q6AFE_CDC_DMA_TX_DAI(did) { \
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.capture = { \
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.stream_name = #did" Capture", \
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.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
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SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
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SNDRV_PCM_RATE_176400, \
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.formats = SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE, \
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.channels_min = 1, \
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.channels_max = 8, \
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.rate_min = 8000, \
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.rate_max = 176400, \
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}, \
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.name = #did, \
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.ops = &q6dma_ops, \
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.id = did, \
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.probe = msm_dai_q6_dai_probe, \
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.remove = msm_dai_q6_dai_remove, \
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}
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struct q6afe_dai_priv_data {
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uint32_t sd_line_mask;
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uint32_t sync_mode;
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@ -307,6 +349,90 @@ static int q6tdm_hw_params(struct snd_pcm_substream *substream,
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return 0;
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}
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static int q6dma_set_channel_map(struct snd_soc_dai *dai,
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unsigned int tx_num, unsigned int *tx_ch_mask,
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unsigned int rx_num, unsigned int *rx_ch_mask)
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{
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struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
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int ch_mask;
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int rc = 0;
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switch (dai->id) {
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case WSA_CODEC_DMA_TX_0:
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case WSA_CODEC_DMA_TX_1:
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case WSA_CODEC_DMA_TX_2:
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case VA_CODEC_DMA_TX_0:
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case VA_CODEC_DMA_TX_1:
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case VA_CODEC_DMA_TX_2:
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case TX_CODEC_DMA_TX_0:
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case TX_CODEC_DMA_TX_1:
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case TX_CODEC_DMA_TX_2:
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case TX_CODEC_DMA_TX_3:
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case TX_CODEC_DMA_TX_4:
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case TX_CODEC_DMA_TX_5:
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if (!tx_ch_mask) {
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dev_err(dai->dev, "tx slot not found\n");
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return -EINVAL;
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}
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if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
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dev_err(dai->dev, "invalid tx num %d\n",
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tx_num);
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return -EINVAL;
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}
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ch_mask = *tx_ch_mask;
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break;
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case WSA_CODEC_DMA_RX_0:
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case WSA_CODEC_DMA_RX_1:
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case RX_CODEC_DMA_RX_0:
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case RX_CODEC_DMA_RX_1:
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case RX_CODEC_DMA_RX_2:
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case RX_CODEC_DMA_RX_3:
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case RX_CODEC_DMA_RX_4:
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case RX_CODEC_DMA_RX_5:
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case RX_CODEC_DMA_RX_6:
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case RX_CODEC_DMA_RX_7:
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/* rx */
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if (!rx_ch_mask) {
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dev_err(dai->dev, "rx slot not found\n");
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return -EINVAL;
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}
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if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
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dev_err(dai->dev, "invalid rx num %d\n",
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rx_num);
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return -EINVAL;
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}
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ch_mask = *rx_ch_mask;
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break;
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default:
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dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
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__func__, dai->id);
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return -EINVAL;
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}
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cfg->active_channels_mask = ch_mask;
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return rc;
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}
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static int q6dma_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
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cfg->bit_width = params_width(params);
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cfg->sample_rate = params_rate(params);
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cfg->num_channels = params_channels(params);
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return 0;
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}
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static void q6afe_dai_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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@ -362,6 +488,10 @@ static int q6afe_dai_prepare(struct snd_pcm_substream *substream,
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q6afe_tdm_port_prepare(dai_data->port[dai->id],
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&dai_data->port_config[dai->id].tdm);
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break;
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case WSA_CODEC_DMA_RX_0 ... RX_CODEC_DMA_RX_7:
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q6afe_cdc_dma_port_prepare(dai_data->port[dai->id],
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&dai_data->port_config[dai->id].dma_cfg);
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break;
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default:
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return -EINVAL;
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}
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@ -430,6 +560,7 @@ static int q6afe_mi2s_set_sysclk(struct snd_soc_dai *dai,
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freq, dir);
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case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
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case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
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case Q6AFE_LPASS_CLK_ID_WSA_CORE_MCLK ... Q6AFE_LPASS_CLK_ID_VA_CORE_2X_MCLK:
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return q6afe_port_set_sysclk(port, clk_id,
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Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
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Q6AFE_LPASS_CLK_ROOT_DEFAULT,
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@ -562,6 +693,29 @@ static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
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{"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
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{"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
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{"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
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{"WSA_CODEC_DMA_RX_0 Playback", NULL, "WSA_CODEC_DMA_RX_0"},
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{"WSA_CODEC_DMA_TX_0", NULL, "WSA_CODEC_DMA_TX_0 Capture"},
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{"WSA_CODEC_DMA_RX_1 Playback", NULL, "WSA_CODEC_DMA_RX_1"},
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{"WSA_CODEC_DMA_TX_1", NULL, "WSA_CODEC_DMA_TX_1 Capture"},
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{"WSA_CODEC_DMA_TX_2", NULL, "WSA_CODEC_DMA_TX_2 Capture"},
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{"VA_CODEC_DMA_TX_0", NULL, "VA_CODEC_DMA_TX_0 Capture"},
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{"VA_CODEC_DMA_TX_1", NULL, "VA_CODEC_DMA_TX_1 Capture"},
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{"VA_CODEC_DMA_TX_2", NULL, "VA_CODEC_DMA_TX_2 Capture"},
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{"RX_CODEC_DMA_RX_0 Playback", NULL, "RX_CODEC_DMA_RX_0"},
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{"TX_CODEC_DMA_TX_0", NULL, "TX_CODEC_DMA_TX_0 Capture"},
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{"RX_CODEC_DMA_RX_1 Playback", NULL, "RX_CODEC_DMA_RX_1"},
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{"TX_CODEC_DMA_TX_1", NULL, "TX_CODEC_DMA_TX_1 Capture"},
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{"RX_CODEC_DMA_RX_2 Playback", NULL, "RX_CODEC_DMA_RX_2"},
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{"TX_CODEC_DMA_TX_2", NULL, "TX_CODEC_DMA_TX_2 Capture"},
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{"RX_CODEC_DMA_RX_3 Playback", NULL, "RX_CODEC_DMA_RX_3"},
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{"TX_CODEC_DMA_TX_3", NULL, "TX_CODEC_DMA_TX_3 Capture"},
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{"RX_CODEC_DMA_RX_4 Playback", NULL, "RX_CODEC_DMA_RX_4"},
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{"TX_CODEC_DMA_TX_4", NULL, "TX_CODEC_DMA_TX_4 Capture"},
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{"RX_CODEC_DMA_RX_5 Playback", NULL, "RX_CODEC_DMA_RX_5"},
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{"TX_CODEC_DMA_TX_5", NULL, "TX_CODEC_DMA_TX_5 Capture"},
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{"RX_CODEC_DMA_RX_6 Playback", NULL, "RX_CODEC_DMA_RX_6"},
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{"RX_CODEC_DMA_RX_7 Playback", NULL, "RX_CODEC_DMA_RX_7"},
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};
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static const struct snd_soc_dai_ops q6hdmi_ops = {
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@ -594,6 +748,14 @@ static const struct snd_soc_dai_ops q6tdm_ops = {
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.hw_params = q6tdm_hw_params,
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};
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static const struct snd_soc_dai_ops q6dma_ops = {
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.prepare = q6afe_dai_prepare,
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.shutdown = q6afe_dai_shutdown,
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.set_sysclk = q6afe_mi2s_set_sysclk,
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.set_channel_map = q6dma_set_channel_map,
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.hw_params = q6dma_hw_params,
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};
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static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
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{
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struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
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@ -1128,6 +1290,28 @@ static struct snd_soc_dai_driver q6afe_dais[] = {
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.probe = msm_dai_q6_dai_probe,
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.remove = msm_dai_q6_dai_remove,
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},
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Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),
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Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),
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Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
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Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_1),
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Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_2),
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Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_0),
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Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_1),
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Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_2),
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Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_0),
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Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_0),
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Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_1),
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Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_1),
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Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_2),
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Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_2),
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Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_3),
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Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_3),
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Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_4),
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Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_4),
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Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_5),
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Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
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Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
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Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
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};
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static int q6afe_of_xlate_dai_name(struct snd_soc_component *component,
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@ -1350,6 +1534,51 @@ static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
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SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_7", NULL,
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("DISPLAY_PORT_RX", "NULL", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_0", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_0", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_1", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_1", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_2", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_0", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_1", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_2", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_0", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_0", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_1", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_1", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_2", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_2", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_3", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_3", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_4", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_4", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_5", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_5", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_6", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_7", "NULL",
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0, SND_SOC_NOPM, 0, 0),
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};
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static const struct snd_soc_component_driver q6afe_dai_component = {
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