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mtd: fsl_ifc_nand: set NAND_NO_SUBPAGE_WRITE

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This controller only does ECC on full-page accesses, even though the
ECC consists of multiple steps.  fsl_elbc_nand can get away with this
because the ECC of an all-0xff region will be all-0xff, but this is not
true with the ECC algorithms used by IFC.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Scott Wood 2013-04-10 17:34:37 -05:00 committed by David Woodhouse
parent 435796889d
commit 20cd0008bb
1 changed files with 1 additions and 1 deletions
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2
drivers/mtd/nand/fsl_ifc_nand.c
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@ -823,7 +823,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
/* set up nand options */
chip->bbt_options = NAND_BBT_USE_FLASH;
chip->options = NAND_NO_SUBPAGE_WRITE;
if (ioread32be(&ifc->cspr_cs[priv->bank].cspr) & CSPR_PORT_SIZE_16) {
chip->read_byte = fsl_ifc_read_byte16;