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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-05 18:39:59 +00:00
ARM: EXYNOS: Support DMA for EXYNOS5250 SoC
mach-exynos/dma.c is updated to support both exynos4 and exynos5. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
parent
06050e5580
commit
20ef9e08d2
5 changed files with 121 additions and 32 deletions
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@ -61,6 +61,7 @@ config SOC_EXYNOS5250
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bool "SAMSUNG EXYNOS5250"
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default y
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depends on ARCH_EXYNOS5
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select SAMSUNG_DMADEV
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help
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Enable EXYNOS5250 SoC support
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@ -70,7 +71,7 @@ config EXYNOS4_MCT
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help
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Use MCT (Multi Core Timer) as kernel timers
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config EXYNOS4_DEV_DMA
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config EXYNOS_DEV_DMA
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bool
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help
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Compile in amba device definitions for DMA controller
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@ -228,7 +229,7 @@ config MACH_ARMLEX4210
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select S3C_DEV_HSMMC2
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select S3C_DEV_HSMMC3
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select EXYNOS4_DEV_AHCI
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select EXYNOS4_DEV_DMA
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select EXYNOS_DEV_DMA
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select EXYNOS4_SETUP_SDHCI
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help
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Machine support for Samsung ARMLEX4210 based on EXYNOS4210
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@ -352,7 +353,7 @@ config MACH_SMDK4212
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select SAMSUNG_DEV_KEYPAD
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select SAMSUNG_DEV_PWM
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select EXYNOS_DEV_SYSMMU
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select EXYNOS4_DEV_DMA
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select EXYNOS_DEV_DMA
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select EXYNOS4_SETUP_I2C1
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select EXYNOS4_SETUP_I2C3
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select EXYNOS4_SETUP_I2C7
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@ -51,7 +51,7 @@ obj-y += dev-uart.o
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obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
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obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
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obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
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obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
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obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
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obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
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obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o
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obj-$(CONFIG_EXYNOS_DEV_SYSMMU) += dev-sysmmu.o
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@ -103,10 +103,45 @@ static u8 exynos4212_pdma0_peri[] = {
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DMACH_MIPI_HSI5,
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};
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struct dma_pl330_platdata exynos4_pdma0_pdata;
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static u8 exynos5250_pdma0_peri[] = {
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DMACH_PCM0_RX,
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DMACH_PCM0_TX,
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DMACH_PCM2_RX,
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DMACH_PCM2_TX,
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DMACH_SPI0_RX,
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DMACH_SPI0_TX,
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DMACH_SPI2_RX,
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DMACH_SPI2_TX,
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DMACH_I2S0S_TX,
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DMACH_I2S0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S2_RX,
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DMACH_I2S2_TX,
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART2_RX,
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DMACH_UART2_TX,
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DMACH_UART4_RX,
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DMACH_UART4_TX,
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DMACH_SLIMBUS0_RX,
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DMACH_SLIMBUS0_TX,
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DMACH_SLIMBUS2_RX,
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DMACH_SLIMBUS2_TX,
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DMACH_SLIMBUS4_RX,
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DMACH_SLIMBUS4_TX,
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DMACH_AC97_MICIN,
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DMACH_AC97_PCMIN,
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DMACH_AC97_PCMOUT,
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DMACH_MIPI_HSI0,
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DMACH_MIPI_HSI2,
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DMACH_MIPI_HSI4,
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DMACH_MIPI_HSI6,
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};
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static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330,
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EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos4_pdma0_pdata);
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static struct dma_pl330_platdata exynos_pdma0_pdata;
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static AMBA_AHB_DEVICE(exynos_pdma0, "dma-pl330.0", 0x00041330,
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EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos_pdma0_pdata);
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static u8 exynos4210_pdma1_peri[] = {
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DMACH_PCM0_RX,
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@ -169,10 +204,45 @@ static u8 exynos4212_pdma1_peri[] = {
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DMACH_MIPI_HSI7,
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};
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static struct dma_pl330_platdata exynos4_pdma1_pdata;
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static u8 exynos5250_pdma1_peri[] = {
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DMACH_PCM0_RX,
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DMACH_PCM0_TX,
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DMACH_PCM1_RX,
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DMACH_PCM1_TX,
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DMACH_SPI1_RX,
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DMACH_SPI1_TX,
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DMACH_PWM,
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DMACH_SPDIF,
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DMACH_I2S0S_TX,
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DMACH_I2S0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S1_RX,
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DMACH_I2S1_TX,
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART1_RX,
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DMACH_UART1_TX,
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DMACH_UART3_RX,
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DMACH_UART3_TX,
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DMACH_SLIMBUS1_RX,
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DMACH_SLIMBUS1_TX,
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DMACH_SLIMBUS3_RX,
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DMACH_SLIMBUS3_TX,
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DMACH_SLIMBUS5_RX,
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DMACH_SLIMBUS5_TX,
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DMACH_SLIMBUS0AUX_RX,
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DMACH_SLIMBUS0AUX_TX,
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DMACH_DISP1,
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DMACH_MIPI_HSI1,
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DMACH_MIPI_HSI3,
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DMACH_MIPI_HSI5,
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DMACH_MIPI_HSI7,
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};
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static AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330,
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EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos4_pdma1_pdata);
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static struct dma_pl330_platdata exynos_pdma1_pdata;
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static AMBA_AHB_DEVICE(exynos_pdma1, "dma-pl330.1", 0x00041330,
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EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos_pdma1_pdata);
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static u8 mdma_peri[] = {
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DMACH_MTOM_0,
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@ -185,46 +255,63 @@ static u8 mdma_peri[] = {
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DMACH_MTOM_7,
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};
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static struct dma_pl330_platdata exynos4_mdma1_pdata = {
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static struct dma_pl330_platdata exynos_mdma1_pdata = {
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.nr_valid_peri = ARRAY_SIZE(mdma_peri),
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.peri_id = mdma_peri,
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};
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static AMBA_AHB_DEVICE(exynos4_mdma1, "dma-pl330.2", 0x00041330,
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EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos4_mdma1_pdata);
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static AMBA_AHB_DEVICE(exynos_mdma1, "dma-pl330.2", 0x00041330,
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EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos_mdma1_pdata);
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static int __init exynos4_dma_init(void)
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static int __init exynos_dma_init(void)
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{
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if (of_have_populated_dt())
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return 0;
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if (soc_is_exynos4210()) {
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exynos4_pdma0_pdata.nr_valid_peri =
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exynos_pdma0_pdata.nr_valid_peri =
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ARRAY_SIZE(exynos4210_pdma0_peri);
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exynos4_pdma0_pdata.peri_id = exynos4210_pdma0_peri;
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exynos4_pdma1_pdata.nr_valid_peri =
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exynos_pdma0_pdata.peri_id = exynos4210_pdma0_peri;
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exynos_pdma1_pdata.nr_valid_peri =
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ARRAY_SIZE(exynos4210_pdma1_peri);
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exynos4_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
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exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
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} else if (soc_is_exynos4212() || soc_is_exynos4412()) {
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exynos4_pdma0_pdata.nr_valid_peri =
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exynos_pdma0_pdata.nr_valid_peri =
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ARRAY_SIZE(exynos4212_pdma0_peri);
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exynos4_pdma0_pdata.peri_id = exynos4212_pdma0_peri;
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exynos4_pdma1_pdata.nr_valid_peri =
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exynos_pdma0_pdata.peri_id = exynos4212_pdma0_peri;
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exynos_pdma1_pdata.nr_valid_peri =
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ARRAY_SIZE(exynos4212_pdma1_peri);
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exynos4_pdma1_pdata.peri_id = exynos4212_pdma1_peri;
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exynos_pdma1_pdata.peri_id = exynos4212_pdma1_peri;
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} else if (soc_is_exynos5250()) {
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exynos_pdma0_pdata.nr_valid_peri =
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ARRAY_SIZE(exynos5250_pdma0_peri);
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exynos_pdma0_pdata.peri_id = exynos5250_pdma0_peri;
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exynos_pdma1_pdata.nr_valid_peri =
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ARRAY_SIZE(exynos5250_pdma1_peri);
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exynos_pdma1_pdata.peri_id = exynos5250_pdma1_peri;
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exynos_pdma0_device.res.start = EXYNOS5_PA_PDMA0;
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exynos_pdma0_device.res.end = EXYNOS5_PA_PDMA0 + SZ_4K;
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exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA0;
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exynos_pdma1_device.res.start = EXYNOS5_PA_PDMA1;
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exynos_pdma1_device.res.end = EXYNOS5_PA_PDMA1 + SZ_4K;
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exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA1;
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exynos_mdma1_device.res.start = EXYNOS5_PA_MDMA1;
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exynos_mdma1_device.res.end = EXYNOS5_PA_MDMA1 + SZ_4K;
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exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_MDMA1;
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}
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dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
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amba_device_register(&exynos4_pdma0_device, &iomem_resource);
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dma_cap_set(DMA_SLAVE, exynos_pdma0_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, exynos_pdma0_pdata.cap_mask);
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amba_device_register(&exynos_pdma0_device, &iomem_resource);
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dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
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amba_device_register(&exynos4_pdma1_device, &iomem_resource);
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dma_cap_set(DMA_SLAVE, exynos_pdma1_pdata.cap_mask);
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dma_cap_set(DMA_CYCLIC, exynos_pdma1_pdata.cap_mask);
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amba_device_register(&exynos_pdma1_device, &iomem_resource);
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dma_cap_set(DMA_MEMCPY, exynos4_mdma1_pdata.cap_mask);
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amba_device_register(&exynos4_mdma1_device, &iomem_resource);
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dma_cap_set(DMA_MEMCPY, exynos_mdma1_pdata.cap_mask);
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amba_device_register(&exynos_mdma1_device, &iomem_resource);
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return 0;
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}
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arch_initcall(exynos4_dma_init);
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arch_initcall(exynos_dma_init);
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@ -291,7 +291,7 @@ config S3C_DMA
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config SAMSUNG_DMADEV
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bool
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select DMADEVICES
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select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \
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select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \
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CPU_S5P6450 || CPU_S5P6440)
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select ARM_AMBA
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help
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@ -90,6 +90,7 @@ enum dma_ch {
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DMACH_MIPI_HSI5,
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DMACH_MIPI_HSI6,
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DMACH_MIPI_HSI7,
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DMACH_DISP1,
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DMACH_MTOM_0,
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DMACH_MTOM_1,
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DMACH_MTOM_2,
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