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clk: qcom: gpucc-sm8550: switch to clk_lucid_ole_pll_configure

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Instead of manually specifying the RINGOSC_CAL_L and CAL_L values in the
alpha_pll_config.l field, use the proper clk_lucid_ole_pll_configure()
function to configure the PLL.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231016084356.1301854-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2023-10-16 11:43:55 +03:00 committed by Bjorn Andersson
parent bff482ace4
commit 21134ec8af
1 changed files with 4 additions and 6 deletions
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10
drivers/clk/qcom/gpucc-sm8550.c
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@ -39,8 +39,7 @@ static const struct pll_vco lucid_ole_vco[] = {
};
static const struct alpha_pll_config gpu_cc_pll0_config = {
/* .l includes RINGOSC_CAL_L_VAL, CAL_L_VAL, L_VAL fields */
.l = 0x4444000d,
.l = 0x0d,
.alpha = 0x0,
.config_ctl_val = 0x20485699,
.config_ctl_hi_val = 0x00182261,
@ -71,8 +70,7 @@ static struct clk_alpha_pll gpu_cc_pll0 = {
};
static const struct alpha_pll_config gpu_cc_pll1_config = {
/* .l includes RINGOSC_CAL_L_VAL, CAL_L_VAL, L_VAL fields */
.l = 0x44440016,
.l = 0x16,
.alpha = 0xeaaa,
.config_ctl_val = 0x20485699,
.config_ctl_hi_val = 0x00182261,
@ -574,8 +572,8 @@ static int gpu_cc_sm8550_probe(struct platform_device *pdev)
if (IS_ERR(regmap))
return PTR_ERR(regmap);
clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
/*
* Keep clocks always enabled: