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net/mlx5: Align mlx5_irq structure
mlx5_irq structure have holes due to incorrect position of fields in it. Make them naturally align. pahole output after alignment: struct mlx5_irq { struct atomic_notifier_head nh; /* 0 72 */ /* --- cacheline 1 boundary (64 bytes) was 8 bytes ago --- */ cpumask_var_t mask; /* 72 8 */ char name[32]; /* 80 32 */ struct mlx5_irq_pool * pool; /* 112 8 */ struct kref kref; /* 120 4 */ u32 index; /* 124 4 */ /* --- cacheline 2 boundary (128 bytes) --- */ int irqn; /* 128 4 */ /* size: 136, cachelines: 3, members: 7 */ /* padding: 4 */ /* last cacheline: 8 bytes */ }; Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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1 changed files with 3 additions and 3 deletions
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@ -28,13 +28,13 @@
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#define MLX5_EQ_REFS_PER_IRQ (2)
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#define MLX5_EQ_REFS_PER_IRQ (2)
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struct mlx5_irq {
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struct mlx5_irq {
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u32 index;
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struct atomic_notifier_head nh;
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struct atomic_notifier_head nh;
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cpumask_var_t mask;
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cpumask_var_t mask;
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char name[MLX5_MAX_IRQ_NAME];
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char name[MLX5_MAX_IRQ_NAME];
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struct kref kref;
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int irqn;
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struct mlx5_irq_pool *pool;
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struct mlx5_irq_pool *pool;
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struct kref kref;
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u32 index;
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int irqn;
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};
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};
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struct mlx5_irq_pool {
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struct mlx5_irq_pool {
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