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KVM: nVMX: Use correct root level for nested EPT shadow page tables
[ Upstream commit148d735eb5
] Hardcode the EPT page-walk level for L2 to be 4 levels, as KVM's MMU currently also hardcodes the page walk level for nested EPT to be 4 levels. The L2 guest is all but guaranteed to soft hang on its first instruction when L1 is using EPT, as KVM will construct 4-level page tables and then tell hardware to use 5-level page tables. Fixes:855feb6736
("KVM: MMU: Add 5 level EPT & Shadow page table support.") Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -5302,6 +5302,9 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
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static int get_ept_level(struct kvm_vcpu *vcpu)
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{
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/* Nested EPT currently only supports 4-level walks. */
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if (is_guest_mode(vcpu) && nested_cpu_has_ept(get_vmcs12(vcpu)))
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return 4;
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if (cpu_has_vmx_ept_5levels() && (cpuid_maxphyaddr(vcpu) > 48))
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return 5;
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return 4;
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