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USB: EHCI: improve end_unlink_async()
This patch (as1665) changes the way ehci-hcd's end_unlink_async() routine works in order to avoid recursive execution and to be more efficient: Now when an IAA cycle ends, a new one gets started up right away (if it is needed) instead of waiting until the just-unlinked QH has been processed. The async_iaa list is renamed to async_idle, which better expresses its new purpose: It is now the list of QHs which are now completely idle and are waiting to be processed by end_unlink_async(). A new flag is added to track whether an IAA cycle is in progress, because the list formerly known as async_iaa no longer stores the QHs waiting for the IAA to finish. The decision about how many QHs to process when an IAA cycle ends is now made at the end of the cycle, when we know the current state of the hardware, rather than at the beginning. This means a bunch of logic got moved from start_iaa_cycle() to end_unlink_async(). Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
6e018751a3
commit
214ac7a077
4 changed files with 60 additions and 46 deletions
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@ -483,7 +483,7 @@ static int ehci_init(struct usb_hcd *hcd)
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*/
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ehci->periodic_size = DEFAULT_I_TDPS;
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INIT_LIST_HEAD(&ehci->async_unlink);
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INIT_LIST_HEAD(&ehci->async_iaa);
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INIT_LIST_HEAD(&ehci->async_idle);
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INIT_LIST_HEAD(&ehci->intr_unlink);
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INIT_LIST_HEAD(&ehci->intr_qh_list);
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INIT_LIST_HEAD(&ehci->cached_itd_list);
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@ -752,7 +752,7 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
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/* guard against (alleged) silicon errata */
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if (cmd & CMD_IAAD)
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ehci_dbg(ehci, "IAA with IAAD still set?\n");
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if (!list_empty(&ehci->async_iaa))
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if (ehci->iaa_in_progress)
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COUNT(ehci->stats.iaa);
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end_unlink_async(ehci);
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}
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@ -960,7 +960,7 @@ static void disable_async(struct ehci_hcd *ehci)
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/* The async schedule and unlink lists are supposed to be empty */
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WARN_ON(ehci->async->qh_next.qh || !list_empty(&ehci->async_unlink) ||
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!list_empty(&ehci->async_iaa));
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!list_empty(&ehci->async_idle));
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/* Don't turn off the schedule until ASS is 1 */
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ehci_poll_ASS(ehci);
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@ -1164,41 +1164,19 @@ static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
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ehci->qh_scan_next = qh->qh_next.qh;
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}
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static void start_iaa_cycle(struct ehci_hcd *ehci, bool nested)
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static void start_iaa_cycle(struct ehci_hcd *ehci)
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{
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/*
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* Do nothing if an IAA cycle is already running or
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* if one will be started shortly.
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*/
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if (!list_empty(&ehci->async_iaa) || ehci->async_unlinking)
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/* Do nothing if an IAA cycle is already running */
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if (ehci->iaa_in_progress)
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return;
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ehci->iaa_in_progress = true;
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/* If the controller isn't running, we don't have to wait for it */
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if (unlikely(ehci->rh_state < EHCI_RH_RUNNING)) {
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/* Do all the waiting QHs */
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list_splice_tail_init(&ehci->async_unlink, &ehci->async_iaa);
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if (!nested) /* Avoid recursion */
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end_unlink_async(ehci);
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end_unlink_async(ehci);
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/* Otherwise start a new IAA cycle */
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} else if (likely(ehci->rh_state == EHCI_RH_RUNNING)) {
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struct ehci_qh *qh;
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/* Do only the first waiting QH (nVidia bug?) */
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qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
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unlink_node);
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/*
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* Intel (?) bug: The HC can write back the overlay region
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* even after the IAA interrupt occurs. In self-defense,
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* always go through two IAA cycles for each QH.
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*/
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if (qh->qh_state == QH_STATE_UNLINK_WAIT)
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qh->qh_state = QH_STATE_UNLINK;
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else
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list_move_tail(&qh->unlink_node, &ehci->async_iaa);
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/* Make sure the unlinks are all visible to the hardware */
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wmb();
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@ -1215,16 +1193,59 @@ static void start_iaa_cycle(struct ehci_hcd *ehci, bool nested)
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static void end_unlink_async(struct ehci_hcd *ehci)
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{
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struct ehci_qh *qh;
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bool early_exit;
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if (ehci->has_synopsys_hc_bug)
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ehci_writel(ehci, (u32) ehci->async->qh_dma,
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&ehci->regs->async_next);
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/* The current IAA cycle has ended */
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ehci->iaa_in_progress = false;
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if (list_empty(&ehci->async_unlink))
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return;
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qh = list_first_entry(&ehci->async_unlink, struct ehci_qh,
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unlink_node); /* QH whose IAA cycle just ended */
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/*
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* If async_unlinking is set then this routine is already running,
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* either on the stack or on another CPU.
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*/
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early_exit = ehci->async_unlinking;
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/* If the controller isn't running, process all the waiting QHs */
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if (ehci->rh_state < EHCI_RH_RUNNING)
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list_splice_tail_init(&ehci->async_unlink, &ehci->async_idle);
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/*
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* Intel (?) bug: The HC can write back the overlay region even
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* after the IAA interrupt occurs. In self-defense, always go
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* through two IAA cycles for each QH.
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*/
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else if (qh->qh_state == QH_STATE_UNLINK_WAIT) {
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qh->qh_state = QH_STATE_UNLINK;
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early_exit = true;
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}
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/* Otherwise process only the first waiting QH (NVIDIA bug?) */
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else
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list_move_tail(&qh->unlink_node, &ehci->async_idle);
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/* Start a new IAA cycle if any QHs are waiting for it */
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if (!list_empty(&ehci->async_unlink))
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start_iaa_cycle(ehci);
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/*
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* Don't allow nesting or concurrent calls,
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* or wait for the second IAA cycle for the next QH.
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*/
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if (early_exit)
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return;
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/* Process the idle QHs */
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restart:
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ehci->async_unlinking = true;
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while (!list_empty(&ehci->async_iaa)) {
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qh = list_first_entry(&ehci->async_iaa, struct ehci_qh,
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while (!list_empty(&ehci->async_idle)) {
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qh = list_first_entry(&ehci->async_idle, struct ehci_qh,
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unlink_node);
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list_del(&qh->unlink_node);
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@ -1239,13 +1260,6 @@ static void end_unlink_async(struct ehci_hcd *ehci)
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disable_async(ehci);
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}
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ehci->async_unlinking = false;
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/* Start a new IAA cycle if any QHs are waiting for it */
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if (!list_empty(&ehci->async_unlink)) {
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start_iaa_cycle(ehci, true);
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if (unlikely(ehci->rh_state < EHCI_RH_RUNNING))
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goto restart;
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}
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}
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static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
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@ -1270,8 +1284,7 @@ static void unlink_empty_async(struct ehci_hcd *ehci)
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}
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/* If nothing else is being unlinked, unlink the last empty QH */
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if (list_empty(&ehci->async_iaa) && list_empty(&ehci->async_unlink) &&
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qh_to_unlink) {
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if (list_empty(&ehci->async_unlink) && qh_to_unlink) {
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start_unlink_async(ehci, qh_to_unlink);
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--count;
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}
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@ -1293,7 +1306,7 @@ static void unlink_empty_async_suspended(struct ehci_hcd *ehci)
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WARN_ON(!list_empty(&qh->qtd_list));
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single_unlink_async(ehci, qh);
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}
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start_iaa_cycle(ehci, false);
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start_iaa_cycle(ehci);
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}
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/* makes sure the async qh will become idle */
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@ -1306,7 +1319,7 @@ static void start_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh)
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return;
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single_unlink_async(ehci, qh);
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start_iaa_cycle(ehci, false);
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start_iaa_cycle(ehci);
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}
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/*-------------------------------------------------------------------------*/
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@ -304,7 +304,7 @@ static void ehci_iaa_watchdog(struct ehci_hcd *ehci)
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* (a) SMP races against real IAA firing and retriggering, and
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* (b) clean HC shutdown, when IAA watchdog was pending.
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*/
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if (ehci->rh_state != EHCI_RH_RUNNING)
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if (!ehci->iaa_in_progress || ehci->rh_state != EHCI_RH_RUNNING)
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return;
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/* If we get here, IAA is *REALLY* late. It's barely
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@ -121,6 +121,7 @@ struct ehci_hcd { /* one per controller */
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bool scanning:1;
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bool need_rescan:1;
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bool intr_unlinking:1;
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bool iaa_in_progress:1;
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bool async_unlinking:1;
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bool shutdown:1;
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struct ehci_qh *qh_scan_next;
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@ -129,7 +130,7 @@ struct ehci_hcd { /* one per controller */
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struct ehci_qh *async;
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struct ehci_qh *dummy; /* For AMD quirk use */
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struct list_head async_unlink;
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struct list_head async_iaa;
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struct list_head async_idle;
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unsigned async_unlink_cycle;
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unsigned async_count; /* async activity count */
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