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Merge branch 'pci/link'
- Remove bandwidth notification for now to avoid reporting spam (Bjorn Helgaas) * pci/link: PCI/LINK: Remove bandwidth notification
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commit
215fc27dd8
5 changed files with 0 additions and 154 deletions
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@ -133,14 +133,6 @@ config PCIE_PTM
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This is only useful if you have devices that support PTM, but it
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is safe to enable even if you don't.
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config PCIE_BW
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bool "PCI Express Bandwidth Change Notification"
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depends on PCIEPORTBUS
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help
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This enables PCI Express Bandwidth Change Notification. If
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you know link width or rate changes occur only to correct
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unreliable links, you may answer Y.
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config PCIE_EDR
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bool "PCI Express Error Disconnect Recover support"
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depends on PCIE_DPC && ACPI
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@ -12,5 +12,4 @@ obj-$(CONFIG_PCIEAER_INJECT) += aer_inject.o
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obj-$(CONFIG_PCIE_PME) += pme.o
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obj-$(CONFIG_PCIE_DPC) += dpc.o
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obj-$(CONFIG_PCIE_PTM) += ptm.o
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obj-$(CONFIG_PCIE_BW) += bw_notification.o
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obj-$(CONFIG_PCIE_EDR) += edr.o
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@ -1,138 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* PCI Express Link Bandwidth Notification services driver
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* Author: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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*
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* Copyright (C) 2019, Dell Inc
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*
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* The PCIe Link Bandwidth Notification provides a way to notify the
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* operating system when the link width or data rate changes. This
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* capability is required for all root ports and downstream ports
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* supporting links wider than x1 and/or multiple link speeds.
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*
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* This service port driver hooks into the bandwidth notification interrupt
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* and warns when links become degraded in operation.
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*/
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#define dev_fmt(fmt) "bw_notification: " fmt
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#include "../pci.h"
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#include "portdrv.h"
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static bool pcie_link_bandwidth_notification_supported(struct pci_dev *dev)
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{
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int ret;
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u32 lnk_cap;
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ret = pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnk_cap);
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return (ret == PCIBIOS_SUCCESSFUL) && (lnk_cap & PCI_EXP_LNKCAP_LBNC);
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}
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static void pcie_enable_link_bandwidth_notification(struct pci_dev *dev)
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{
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u16 lnk_ctl;
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pcie_capability_write_word(dev, PCI_EXP_LNKSTA, PCI_EXP_LNKSTA_LBMS);
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pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &lnk_ctl);
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lnk_ctl |= PCI_EXP_LNKCTL_LBMIE;
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pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnk_ctl);
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}
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static void pcie_disable_link_bandwidth_notification(struct pci_dev *dev)
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{
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u16 lnk_ctl;
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pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &lnk_ctl);
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lnk_ctl &= ~PCI_EXP_LNKCTL_LBMIE;
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pcie_capability_write_word(dev, PCI_EXP_LNKCTL, lnk_ctl);
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}
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static irqreturn_t pcie_bw_notification_irq(int irq, void *context)
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{
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struct pcie_device *srv = context;
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struct pci_dev *port = srv->port;
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u16 link_status, events;
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int ret;
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ret = pcie_capability_read_word(port, PCI_EXP_LNKSTA, &link_status);
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events = link_status & PCI_EXP_LNKSTA_LBMS;
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if (ret != PCIBIOS_SUCCESSFUL || !events)
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return IRQ_NONE;
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pcie_capability_write_word(port, PCI_EXP_LNKSTA, events);
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pcie_update_link_speed(port->subordinate, link_status);
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return IRQ_WAKE_THREAD;
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}
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static irqreturn_t pcie_bw_notification_handler(int irq, void *context)
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{
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struct pcie_device *srv = context;
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struct pci_dev *port = srv->port;
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struct pci_dev *dev;
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/*
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* Print status from downstream devices, not this root port or
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* downstream switch port.
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*/
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down_read(&pci_bus_sem);
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list_for_each_entry(dev, &port->subordinate->devices, bus_list)
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pcie_report_downtraining(dev);
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up_read(&pci_bus_sem);
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return IRQ_HANDLED;
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}
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static int pcie_bandwidth_notification_probe(struct pcie_device *srv)
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{
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int ret;
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/* Single-width or single-speed ports do not have to support this. */
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if (!pcie_link_bandwidth_notification_supported(srv->port))
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return -ENODEV;
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ret = request_threaded_irq(srv->irq, pcie_bw_notification_irq,
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pcie_bw_notification_handler,
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IRQF_SHARED, "PCIe BW notif", srv);
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if (ret)
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return ret;
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pcie_enable_link_bandwidth_notification(srv->port);
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pci_info(srv->port, "enabled with IRQ %d\n", srv->irq);
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return 0;
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}
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static void pcie_bandwidth_notification_remove(struct pcie_device *srv)
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{
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pcie_disable_link_bandwidth_notification(srv->port);
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free_irq(srv->irq, srv);
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}
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static int pcie_bandwidth_notification_suspend(struct pcie_device *srv)
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{
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pcie_disable_link_bandwidth_notification(srv->port);
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return 0;
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}
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static int pcie_bandwidth_notification_resume(struct pcie_device *srv)
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{
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pcie_enable_link_bandwidth_notification(srv->port);
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return 0;
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}
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static struct pcie_port_service_driver pcie_bandwidth_notification_driver = {
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.name = "pcie_bw_notification",
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.port_type = PCIE_ANY_PORT,
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.service = PCIE_PORT_SERVICE_BWNOTIF,
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.probe = pcie_bandwidth_notification_probe,
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.suspend = pcie_bandwidth_notification_suspend,
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.resume = pcie_bandwidth_notification_resume,
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.remove = pcie_bandwidth_notification_remove,
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};
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int __init pcie_bandwidth_notification_init(void)
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{
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return pcie_port_service_register(&pcie_bandwidth_notification_driver);
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}
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@ -53,12 +53,6 @@ int pcie_dpc_init(void);
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static inline int pcie_dpc_init(void) { return 0; }
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#endif
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#ifdef CONFIG_PCIE_BW
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int pcie_bandwidth_notification_init(void);
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#else
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static inline int pcie_bandwidth_notification_init(void) { return 0; }
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#endif
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/* Port Type */
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#define PCIE_ANY_PORT (~0)
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@ -256,7 +256,6 @@ static void __init pcie_init_services(void)
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pcie_pme_init();
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pcie_dpc_init();
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pcie_hp_init();
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pcie_bandwidth_notification_init();
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}
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static int __init pcie_portdrv_init(void)
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