ARM: dts: at91: add devicetree for the Axentia TSE-850
The Axentia TSE-850 is a SAMA5D3-based device designed to generate FM subcarrier signals. Signed-off-by: Peter Rosin <peda@axentia.se> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
This commit is contained in:
Peter Rosin
Alexandre Belloni
parent
5347d80655
commit
21dd0ece34
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@ -0,0 +1,19 @@
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Device tree bindings for Axentia ARM devices
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============================================
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Linea CPU module
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----------------
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Required root node properties:
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compatible = "axentia,linea",
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"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
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and following the rules from atmel-at91.txt for a sama5d31 SoC.
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TSE-850 v3 board
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----------------
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Required root node properties:
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compatible = "axentia,tse850v3", "axentia,linea",
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"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
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and following the rules from above for the axentia,linea CPU module.
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@ -2353,6 +2353,14 @@ S: Maintained
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F: Documentation/devicetree/bindings/sound/axentia,*
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F: sound/soc/atmel/tse850-pcm5142.c
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AXENTIA ARM DEVICES
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M: Peter Rosin <peda@axentia.se>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: Documentation/devicetree/bindings/arm/axentia.txt
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F: arch/arm/boot/dts/at91-linea.dtsi
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F: arch/arm/boot/dts/at91-tse850-3.dts
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AZ6007 DVB DRIVER
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M: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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M: Mauro Carvalho Chehab <mchehab@kernel.org>
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@ -48,6 +48,7 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
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at91-kizbox2.dtb \
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at91-sama5d2_xplained.dtb \
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at91-sama5d3_xplained.dtb \
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at91-tse850-3.dtb \
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sama5d31ek.dtb \
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sama5d33ek.dtb \
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sama5d34ek.dtb \
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/*
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* at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
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*
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* Copyright (C) 2017 Axentia Technologies AB
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*
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* Author: Peter Rosin <peda@axentia.se>
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*
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* Licensed under GPLv2 or later.
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*/
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#include "sama5d31.dtsi"
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/ {
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compatible = "axentia,linea",
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"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
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memory {
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reg = <0x20000000 0x4000000>;
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};
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};
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&slow_xtal {
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clock-frequency = <32768>;
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};
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&main_xtal {
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clock-frequency = <12000000>;
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};
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&i2c0 {
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status = "okay";
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eeprom@51 {
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compatible = "st,24c64";
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reg = <0x51>;
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pagesize = <32>;
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};
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};
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&nand0 {
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status = "okay";
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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atmel,has-pmecc;
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atmel,pmecc-cap = <4>;
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atmel,pmecc-sector-size = <512>;
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nand-on-flash-bbt;
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};
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@ -0,0 +1,274 @@
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/*
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* at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
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*
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* Copyright (C) 2017 Axentia Technologies AB
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*
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* Author: Peter Rosin <peda@axentia.se>
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*
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* Licensed under GPLv2 or later.
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*/
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/dts-v1/;
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#include <dt-bindings/pwm/pwm.h>
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#include "at91-linea.dtsi"
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/ {
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model = "Axentia TSE-850 3.0";
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compatible = "axentia,tse850v3", "axentia,linea",
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"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
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ahb {
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apb {
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pinctrl@fffff200 {
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tse850 {
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pinctrl_usba_vbus: usba-vbus {
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atmel,pins =
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<AT91_PIOC 31
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AT91_PERIPH_GPIO
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AT91_PINCTRL_DEGLITCH>;
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};
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};
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};
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watchdog@fffffe40 {
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status = "okay";
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};
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};
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};
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sck: oscillator {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <16000000>;
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clock-output-names = "sck";
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};
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reg_3v3: regulator {
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compatible = "regulator-fixed";
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regulator-name = "3v3-supply";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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ana: reg-ana {
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compatible = "pwm-regulator";
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regulator-name = "ANA";
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pwms = <&pwm0 2 1000 PWM_POLARITY_INVERTED>;
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pwm-dutycycle-unit = <1000>;
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pwm-dutycycle-range = <100 1000>;
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regulator-min-microvolt = <2000000>;
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regulator-max-microvolt = <20000000>;
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regulator-ramp-delay = <1000>;
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};
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sound {
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compatible = "axentia,tse850-pcm5142";
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axentia,cpu-dai = <&ssc0>;
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axentia,audio-codec = <&pcm5142>;
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axentia,add-gpios = <&pioA 8 GPIO_ACTIVE_LOW>;
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axentia,loop1-gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
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axentia,loop2-gpios = <&pioA 11 GPIO_ACTIVE_LOW>;
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axentia,ana-supply = <&ana>;
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};
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dac: dpot-dac {
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compatible = "dpot-dac";
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vref-supply = <®_3v3>;
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io-channels = <&dpot 0>;
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io-channel-names = "dpot";
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#io-channel-cells = <1>;
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};
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envelope-detector {
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compatible = "axentia,tse850-envelope-detector";
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io-channels = <&dac 0>;
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io-channel-names = "dac";
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interrupt-parent = <&pioA>;
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interrupts = <3 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "comp";
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};
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leds {
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compatible = "gpio-leds";
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ch1-red {
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label = "ch-1:red";
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gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
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};
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ch1-green {
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label = "ch-1:green";
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gpios = <&pioA 22 GPIO_ACTIVE_LOW>;
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};
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ch2-red {
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label = "ch-2:red";
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gpios = <&pioA 21 GPIO_ACTIVE_LOW>;
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};
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ch2-green {
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label = "ch-2:green";
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gpios = <&pioA 20 GPIO_ACTIVE_LOW>;
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};
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data-red {
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label = "data:red";
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gpios = <&pioA 19 GPIO_ACTIVE_LOW>;
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};
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data-green {
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label = "data:green";
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gpios = <&pioA 18 GPIO_ACTIVE_LOW>;
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};
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alarm-red {
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label = "alarm:red";
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gpios = <&pioA 17 GPIO_ACTIVE_LOW>;
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};
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alarm-green {
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label = "alarm:green";
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gpios = <&pioA 16 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&nand0 {
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at91bootstrap@0 {
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label = "at91bootstrap";
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reg = <0x0 0x40000>;
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};
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barebox@40000 {
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label = "bootloader";
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reg = <0x40000 0x60000>;
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};
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bareboxenv@c0000 {
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label = "bareboxenv";
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reg = <0xc0000 0x40000>;
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};
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bareboxenv2@100000 {
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label = "bareboxenv2";
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reg = <0x100000 0x40000>;
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};
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oftree@180000 {
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label = "oftree";
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reg = <0x180000 0x20000>;
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};
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kernel@200000 {
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label = "kernel";
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reg = <0x200000 0x500000>;
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};
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rootfs@800000 {
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label = "rootfs";
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reg = <0x800000 0x0f800000>;
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};
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ovlfs@10000000 {
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label = "ovlfs";
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reg = <0x10000000 0x10000000>;
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};
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};
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&ssc0 {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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jc42@18 {
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compatible = "nxp,se97b", "jedec,jc-42.4-temp";
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reg = <0x18>;
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};
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dpot: mcp4651-104@28 {
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compatible = "microchip,mcp4651-104";
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reg = <0x28>;
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#io-channel-cells = <1>;
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};
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pcm5142: pcm5142@4c {
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compatible = "ti,pcm5142";
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reg = <0x4c>;
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AVDD-supply = <®_3v3>;
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DVDD-supply = <®_3v3>;
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CPVDD-supply = <®_3v3>;
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clocks = <&sck>;
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pll-in = <3>;
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pll-out = <6>;
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};
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eeprom@50 {
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compatible = "nxp,24c02";
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reg = <0x50>;
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pagesize = <16>;
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};
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};
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&usart0 {
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status = "okay";
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atmel,use-dma-rx;
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};
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&pwm0 {
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status = "okay";
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pinctrl-0 = <&pinctrl_pwm0_pwml2_1>;
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pinctrl-names = "default";
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};
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&macb1 {
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status = "okay";
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phy-mode = "rgmii";
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@3 {
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reg = <3>;
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interrupt-parent = <&pioE>;
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interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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&usb0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usba_vbus>;
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atmel,vbus-gpio = <&pioC 31 GPIO_ACTIVE_HIGH>;
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};
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&usb1 {
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status = "okay";
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num-ports = <1>;
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atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
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atmel,oc-gpio = <&pioC 15 GPIO_ACTIVE_LOW>;
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};
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&usb2 {
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status = "okay";
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};
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&dbgu {
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status = "okay";
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dmas = <0>, <0>; /* Do not use DMA for dbgu */
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};
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