mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-29 23:53:32 +00:00
staging: rts5208: align divided lines to opening paranthesis
Make all divided lines aligned to the opening paranthesis. Basically makes all lines aligned to the opening paranthesis to make the code more readable and it also gets rid of a lot of checkpatch.pl "checks". Signed-off-by: Giedrius Statkevičius <giedrius.statkevicius@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Giedrius Statkevičius
Greg Kroah-Hartman
parent
e050dda1e5
commit
21e69b7274
1 changed files with 45 additions and 42 deletions
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@ -126,10 +126,11 @@ static int rtsx_pre_handle_sdio_old(struct rtsx_chip *chip)
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if (chip->ignore_sd && CHK_SDIO_EXIST(chip)) {
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if (chip->asic_code) {
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RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
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MS_INS_PU | SD_WP_PU | SD_CD_PU | SD_CMD_PU);
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MS_INS_PU | SD_WP_PU |
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SD_CD_PU | SD_CMD_PU);
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} else {
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RTSX_WRITE_REG(chip, FPGA_PULL_CTL, 0xFF,
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FPGA_SD_PULL_CTL_EN);
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FPGA_SD_PULL_CTL_EN);
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}
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RTSX_WRITE_REG(chip, CARD_SHARE_MODE, 0xFF, CARD_SHARE_48_SD);
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@ -137,7 +138,7 @@ static int rtsx_pre_handle_sdio_old(struct rtsx_chip *chip)
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RTSX_WRITE_REG(chip, 0xFF2C, 0x01, 0x01);
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RTSX_WRITE_REG(chip, SDIO_CTRL, 0xFF,
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SDIO_BUS_CTRL | SDIO_CD_CTRL);
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SDIO_BUS_CTRL | SDIO_CD_CTRL);
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chip->sd_int = 1;
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chip->sd_io = 1;
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@ -201,7 +202,7 @@ static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip)
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TRACE_RET(chip, STATUS_FAIL);
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} else {
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RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
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FPGA_SD_PULL_CTL_BIT | 0x20, 0);
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FPGA_SD_PULL_CTL_BIT | 0x20, 0);
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}
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retval = card_share_mode(chip, SD_CARD);
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if (retval != STATUS_SUCCESS)
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@ -268,7 +269,7 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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#ifdef LED_AUTO_BLINK
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RTSX_WRITE_REG(chip, CARD_AUTO_BLINK, 0xFF,
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LED_BLINK_SPEED | BLINK_EN | LED_GPIO0);
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LED_BLINK_SPEED | BLINK_EN | LED_GPIO0);
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#endif
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if (chip->asic_code) {
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@ -297,7 +298,7 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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} else {
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if (CHECK_PID(chip, 0x5208))
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RTSX_WRITE_REG(chip, ASPM_FORCE_CTL,
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0xFF, 0x3F);
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0xFF, 0x3F);
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retval = rtsx_write_config_byte(chip, LCTLR,
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chip->aspm_l0s_l1_en);
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@ -337,10 +338,10 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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if (CHK_SDIO_EXIST(chip)) {
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if (CHECK_PID(chip, 0x5288))
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retval = rtsx_write_cfg_dw(chip, 2, 0xC0,
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0xFF00, 0x0100);
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0xFF00, 0x0100);
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else
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retval = rtsx_write_cfg_dw(chip, 1, 0xC0,
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0xFF00, 0x0100);
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0xFF00, 0x0100);
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if (retval != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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@ -381,7 +382,7 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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reg &= 0xFE7F;
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reg |= 0x80;
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retval = rtsx_write_phy_register(chip, 0x00,
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reg);
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reg);
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if (retval != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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@ -392,13 +393,13 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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reg &= 0xFFF7;
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retval = rtsx_write_phy_register(chip, 0x1C,
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reg);
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reg);
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if (retval != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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}
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if (chip->driver_first_load &&
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(chip->ic_version < IC_VER_C))
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(chip->ic_version < IC_VER_C))
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rtsx_calibration(chip);
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} else {
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@ -434,7 +435,7 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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} else {
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chip->sd_io = 0;
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RTSX_WRITE_REG(chip, SDIO_CTRL, SDIO_BUS_CTRL | SDIO_CD_CTRL,
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0);
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0);
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}
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nextcard:
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@ -475,10 +476,10 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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if (chip->ft2_fast_mode) {
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RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0xFF,
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MS_PARTIAL_POWER_ON | SD_PARTIAL_POWER_ON);
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MS_PARTIAL_POWER_ON | SD_PARTIAL_POWER_ON);
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udelay(chip->pmos_pwr_on_interval);
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RTSX_WRITE_REG(chip, CARD_PWR_CTL, 0xFF,
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MS_POWER_ON | SD_POWER_ON);
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MS_POWER_ON | SD_POWER_ON);
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wait_timeout(200);
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}
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@ -847,8 +848,8 @@ static void rtsx_monitor_aspm_config(struct rtsx_chip *chip)
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chip->sdio_aspm = 0;
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}
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rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFF,
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0x30 | chip->aspm_level[0] |
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(chip->aspm_level[1] << 2));
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0x30 | chip->aspm_level[0] |
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(chip->aspm_level[1] << 2));
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}
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}
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@ -945,7 +946,7 @@ void rtsx_polling_func(struct rtsx_chip *chip)
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#ifdef SUPPORT_SDIO_ASPM
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if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip) &&
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chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
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chip->aspm_l0s_l1_en && chip->dynamic_aspm) {
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if (chip->sd_io) {
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dynamic_configure_sdio_aspm(chip);
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} else {
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@ -1009,7 +1010,7 @@ void rtsx_polling_func(struct rtsx_chip *chip)
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if (chip->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) {
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if (chip->card_exist & SD_CARD) {
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rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN,
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0);
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0);
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card_power_off(chip, SD_CARD);
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chip->card_fail |= SD_CARD;
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}
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@ -1017,7 +1018,7 @@ void rtsx_polling_func(struct rtsx_chip *chip)
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if (chip->ocp_stat & (MS_OC_NOW | MS_OC_EVER)) {
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if (chip->card_exist & MS_CARD) {
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rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
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0);
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0);
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card_power_off(chip, MS_CARD);
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chip->card_fail |= MS_CARD;
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}
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@ -1028,15 +1029,15 @@ void rtsx_polling_func(struct rtsx_chip *chip)
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chip->ocp_stat);
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if (chip->card_exist & SD_CARD) {
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rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN,
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0);
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0);
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chip->card_fail |= SD_CARD;
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} else if (chip->card_exist & MS_CARD) {
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rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
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0);
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0);
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chip->card_fail |= MS_CARD;
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} else if (chip->card_exist & XD_CARD) {
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rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN,
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0);
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0);
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chip->card_fail |= XD_CARD;
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}
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card_power_off(chip, SD_CARD);
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@ -1046,7 +1047,7 @@ void rtsx_polling_func(struct rtsx_chip *chip)
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delink_stage:
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if (chip->auto_delink_en && chip->auto_delink_allowed &&
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!chip->card_ready && !chip->card_ejected && !chip->sd_io) {
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!chip->card_ready && !chip->card_ejected && !chip->sd_io) {
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int enter_L1 = chip->auto_delink_in_L1 && (
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chip->aspm_l0s_l1_en || chip->ss_en);
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int delink_stage1_cnt = chip->delink_stage1_step;
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@ -1069,8 +1070,8 @@ void rtsx_polling_func(struct rtsx_chip *chip)
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rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 1);
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rtsx_write_register(chip,
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CHANGE_LINK_STATE, 0x0A,
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0x0A);
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CHANGE_LINK_STATE,
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0x0A, 0x0A);
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if (enter_L1)
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rtsx_enter_L1(chip);
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@ -1082,7 +1083,9 @@ void rtsx_polling_func(struct rtsx_chip *chip)
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if (enter_L1)
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rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03, 1);
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rtsx_write_register(chip, CHANGE_LINK_STATE, 0x02, 0x02);
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rtsx_write_register(chip,
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CHANGE_LINK_STATE,
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0x02, 0x02);
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if (enter_L1)
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rtsx_enter_L1(chip);
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@ -1099,7 +1102,7 @@ void rtsx_polling_func(struct rtsx_chip *chip)
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rtsx_set_phy_reg_bit(chip, 0x1C, 2);
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rtsx_write_register(chip, CHANGE_LINK_STATE,
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0x0A, 0x0A);
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0x0A, 0x0A);
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}
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chip->auto_delink_cnt++;
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@ -1203,7 +1206,7 @@ int rtsx_read_register(struct rtsx_chip *chip, u16 addr, u8 *data)
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}
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int rtsx_write_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 mask,
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u32 val)
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u32 val)
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{
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u8 mode = 0, tmp;
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int i;
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@ -1263,7 +1266,7 @@ int rtsx_read_cfg_dw(struct rtsx_chip *chip, u8 func_no, u16 addr, u32 *val)
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}
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int rtsx_write_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf,
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int len)
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int len)
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{
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u32 *data, *mask;
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u16 offset = addr % 4;
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@ -1308,7 +1311,7 @@ int rtsx_write_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf,
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for (i = 0; i < dw_len; i++) {
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retval = rtsx_write_cfg_dw(chip, func, aligned_addr + i * 4,
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mask[i], data[i]);
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mask[i], data[i]);
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if (retval != STATUS_SUCCESS) {
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vfree(data);
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vfree(mask);
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@ -1323,7 +1326,7 @@ int rtsx_write_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf,
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}
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int rtsx_read_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf,
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int len)
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int len)
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{
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u32 *data;
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u16 offset = addr % 4;
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@ -1344,7 +1347,7 @@ int rtsx_read_cfg_seq(struct rtsx_chip *chip, u8 func, u16 addr, u8 *buf,
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for (i = 0; i < dw_len; i++) {
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retval = rtsx_read_cfg_dw(chip, func, aligned_addr + i * 4,
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data + i);
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data + i);
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if (retval != STATUS_SUCCESS) {
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vfree(data);
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TRACE_RET(chip, STATUS_FAIL);
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@ -1650,7 +1653,7 @@ int rtsx_pre_handle_interrupt(struct rtsx_chip *chip)
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chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
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if (((chip->int_reg & int_enable) == 0) ||
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(chip->int_reg == 0xFFFFFFFF))
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(chip->int_reg == 0xFFFFFFFF))
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return STATUS_FAIL;
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status = chip->int_reg &= (int_enable | 0x7FFFFF);
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@ -1756,14 +1759,14 @@ void rtsx_do_before_power_down(struct rtsx_chip *chip, int pm_stat)
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if (pm_stat == PM_S1) {
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dev_dbg(rtsx_dev(chip), "Host enter S1\n");
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rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03,
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HOST_ENTER_S1);
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HOST_ENTER_S1);
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} else if (pm_stat == PM_S3) {
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if (chip->s3_pwr_off_delay > 0)
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wait_timeout(chip->s3_pwr_off_delay);
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dev_dbg(rtsx_dev(chip), "Host enter S3\n");
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rtsx_write_register(chip, HOST_SLEEP_STATE, 0x03,
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HOST_ENTER_S3);
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HOST_ENTER_S3);
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}
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if (chip->do_delink_before_power_down && chip->auto_delink_en)
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@ -1786,10 +1789,10 @@ void rtsx_enable_aspm(struct rtsx_chip *chip)
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rtsx_write_phy_register(chip, 0x07, 0);
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if (CHECK_PID(chip, 0x5208)) {
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rtsx_write_register(chip, ASPM_FORCE_CTL, 0xF3,
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0x30 | chip->aspm_level[0]);
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0x30 | chip->aspm_level[0]);
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} else {
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rtsx_write_config_byte(chip, LCTLR,
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chip->aspm_l0s_l1_en);
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chip->aspm_l0s_l1_en);
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}
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if (CHK_SDIO_EXIST(chip)) {
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@ -1797,10 +1800,10 @@ void rtsx_enable_aspm(struct rtsx_chip *chip)
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if (CHECK_PID(chip, 0x5288))
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rtsx_write_cfg_dw(chip, 2, 0xC0,
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0xFFFF, val);
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0xFFFF, val);
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else
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rtsx_write_cfg_dw(chip, 1, 0xC0,
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0xFFFF, val);
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0xFFFF, val);
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}
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}
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}
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@ -1818,7 +1821,7 @@ void rtsx_disable_aspm(struct rtsx_chip *chip)
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rtsx_write_phy_register(chip, 0x07, 0x0129);
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if (CHECK_PID(chip, 0x5208))
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rtsx_write_register(chip, ASPM_FORCE_CTL,
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0xF3, 0x30);
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0xF3, 0x30);
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else
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rtsx_write_config_byte(chip, LCTLR, 0x00);
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@ -1885,7 +1888,7 @@ int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len)
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for (j = 0; j < 256; j++) {
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rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF,
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*ptr);
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*ptr);
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ptr++;
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}
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@ -1899,7 +1902,7 @@ int rtsx_write_ppbuf(struct rtsx_chip *chip, u8 *buf, int buf_len)
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for (j = 0; j < buf_len%256; j++) {
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rtsx_add_cmd(chip, WRITE_REG_CMD, reg_addr++, 0xFF,
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*ptr);
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*ptr);
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ptr++;
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}
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