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arm: dts: mt2712: add uart APDMA to device tree

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1. add uart APDMA controller device node
2. add uart 0/1/2/3/4/5 DMA function

Signed-off-by: Long Cheng <long.cheng@mediatek.com>
Link: https://lore.kernel.org/r/1556336193-15198-3-git-send-email-long.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Long Cheng 2019-04-27 11:36:31 +08:00 committed by Matthias Brugger
parent 5e6cdf0051
commit 21eb9ec7c3
1 changed files with 51 additions and 0 deletions
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51
arch/arm64/boot/dts/mediatek/mt2712e.dtsi
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@ -300,6 +300,9 @@ uart5: serial@1000f000 {
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
clocks = <&baud_clk>, <&sys_clk>;
clock-names = "baud", "bus";
dmas = <&apdma 10
&apdma 11>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -375,6 +378,39 @@ gic: interrupt-controller@10510000 {
(GIC_CPU_MASK_RAW(0x13) | IRQ_TYPE_LEVEL_HIGH)>;
};
apdma: dma-controller@11000400 {
compatible = "mediatek,mt2712-uart-dma",
"mediatek,mt6577-uart-dma";
reg = <0 0x11000400 0 0x80>,
<0 0x11000480 0 0x80>,
<0 0x11000500 0 0x80>,
<0 0x11000580 0 0x80>,
<0 0x11000600 0 0x80>,
<0 0x11000680 0 0x80>,
<0 0x11000700 0 0x80>,
<0 0x11000780 0 0x80>,
<0 0x11000800 0 0x80>,
<0 0x11000880 0 0x80>,
<0 0x11000900 0 0x80>,
<0 0x11000980 0 0x80>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 114 IRQ_TYPE_LEVEL_LOW>;
dma-requests = <12>;
clocks = <&pericfg CLK_PERI_AP_DMA>;
clock-names = "apdma";
#dma-cells = <1>;
};
auxadc: adc@11001000 {
compatible = "mediatek,mt2712-auxadc";
reg = <0 0x11001000 0 0x1000>;
@ -391,6 +427,9 @@ uart0: serial@11002000 {
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
clocks = <&baud_clk>, <&sys_clk>;
clock-names = "baud", "bus";
dmas = <&apdma 0
&apdma 1>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -401,6 +440,9 @@ uart1: serial@11003000 {
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
clocks = <&baud_clk>, <&sys_clk>;
clock-names = "baud", "bus";
dmas = <&apdma 2
&apdma 3>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -411,6 +453,9 @@ uart2: serial@11004000 {
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
clocks = <&baud_clk>, <&sys_clk>;
clock-names = "baud", "bus";
dmas = <&apdma 4
&apdma 5>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -421,6 +466,9 @@ uart3: serial@11005000 {
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
clocks = <&baud_clk>, <&sys_clk>;
clock-names = "baud", "bus";
dmas = <&apdma 6
&apdma 7>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -635,6 +683,9 @@ uart4: serial@11019000 {
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_LOW>;
clocks = <&baud_clk>, <&sys_clk>;
clock-names = "baud", "bus";
dmas = <&apdma 8
&apdma 9>;
dma-names = "tx", "rx";
status = "disabled";
};