ARM: add Highbank core platform support
This adds basic support for the Calxeda Highbank platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
parent
253d7addbc
commit
220e6cf7b7
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@ -330,6 +330,20 @@ config ARCH_BCMRING
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help
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help
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Support for Broadcom's BCMRing platform.
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Support for Broadcom's BCMRing platform.
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config ARCH_HIGHBANK
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bool "Calxeda Highbank-based"
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARM_AMBA
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select ARM_GIC
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select ARM_TIMER_SP804
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select CLKDEV_LOOKUP
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select CPU_V7
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select GENERIC_CLOCKEVENTS
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select HAVE_ARM_SCU
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select USE_OF
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help
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Support for the Calxeda Highbank SoC based boards.
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config ARCH_CLPS711X
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config ARCH_CLPS711X
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bool "Cirrus Logic CLPS711x/EP721x-based"
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bool "Cirrus Logic CLPS711x/EP721x-based"
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select CPU_ARM720T
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select CPU_ARM720T
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@ -128,6 +128,13 @@ choice
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Say Y here if you want the debug print routines to direct
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Say Y here if you want the debug print routines to direct
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their output to the second serial port on these devices.
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their output to the second serial port on these devices.
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config DEBUG_HIGHBANK_UART
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bool "Kernel low-level debugging messages via Highbank UART"
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depends on ARCH_HIGHBANK
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help
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Say Y here if you want the debug print routines to direct
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their output to the UART on Highbank based devices.
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endchoice
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endchoice
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config EARLY_PRINTK
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config EARLY_PRINTK
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@ -144,6 +144,7 @@ machine-$(CONFIG_ARCH_EBSA110) := ebsa110
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machine-$(CONFIG_ARCH_EP93XX) := ep93xx
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machine-$(CONFIG_ARCH_EP93XX) := ep93xx
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machine-$(CONFIG_ARCH_GEMINI) := gemini
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machine-$(CONFIG_ARCH_GEMINI) := gemini
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machine-$(CONFIG_ARCH_H720X) := h720x
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machine-$(CONFIG_ARCH_H720X) := h720x
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machine-$(CONFIG_ARCH_HIGHBANK) := highbank
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machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
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machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
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machine-$(CONFIG_ARCH_IOP13XX) := iop13xx
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machine-$(CONFIG_ARCH_IOP13XX) := iop13xx
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machine-$(CONFIG_ARCH_IOP32X) := iop32x
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machine-$(CONFIG_ARCH_IOP32X) := iop32x
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@ -0,0 +1,2 @@
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obj-y := clock.o highbank.o system.o
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obj-$(CONFIG_DEBUG_HIGHBANK_UART) += lluart.o
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@ -0,0 +1 @@
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zreladdr-y := 0x00008000
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@ -0,0 +1,62 @@
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/*
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* Copyright 2011 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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struct clk {
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unsigned long rate;
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};
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int clk_enable(struct clk *clk)
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{
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return 0;
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}
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void clk_disable(struct clk *clk)
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{}
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unsigned long clk_get_rate(struct clk *clk)
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{
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return clk->rate;
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}
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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return clk->rate;
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}
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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return 0;
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}
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static struct clk eclk = { .rate = 200000000 };
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static struct clk pclk = { .rate = 150000000 };
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static struct clk_lookup lookups[] = {
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{ .clk = &pclk, .con_id = "apb_pclk", },
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{ .clk = &pclk, .dev_id = "sp804", },
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{ .clk = &eclk, .dev_id = "ffe0e000.sdhci", },
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{ .clk = &pclk, .dev_id = "fff36000.serial", },
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};
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void __init highbank_clocks_init(void)
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{
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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}
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@ -0,0 +1,9 @@
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extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
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extern void highbank_clocks_init(void);
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extern void __iomem *scu_base_addr;
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#ifdef CONFIG_DEBUG_HIGHBANK_UART
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extern void highbank_lluart_map_io(void);
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#else
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static inline void highbank_lluart_map_io(void) {}
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#endif
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@ -0,0 +1,145 @@
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/*
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* Copyright 2010-2011 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/of_address.h>
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#include <asm/cacheflush.h>
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#include <asm/unified.h>
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#include <asm/smp_scu.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/hardware/timer-sp.h>
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#include <asm/hardware/gic.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/irqs.h>
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#include "core.h"
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#include "sysregs.h"
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void __iomem *sregs_base;
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#define HB_SCU_VIRT_BASE 0xfee00000
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void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
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static struct map_desc scu_io_desc __initdata = {
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.virtual = HB_SCU_VIRT_BASE,
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.pfn = 0, /* run-time */
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.length = SZ_4K,
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.type = MT_DEVICE,
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};
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static void __init highbank_scu_map_io(void)
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{
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unsigned long base;
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/* Get SCU base */
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asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
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scu_io_desc.pfn = __phys_to_pfn(base);
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iotable_init(&scu_io_desc, 1);
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}
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static void __init highbank_map_io(void)
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{
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highbank_scu_map_io();
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highbank_lluart_map_io();
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}
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#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
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#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
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void highbank_set_cpu_jump(int cpu, void *jump_addr)
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{
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writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
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__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
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outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
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HB_JUMP_TABLE_PHYS(cpu) + 15);
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}
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const static struct of_device_id irq_match[] = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
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{}
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};
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static void __init highbank_init_irq(void)
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{
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of_irq_init(irq_match);
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l2x0_of_init(0, ~0UL);
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}
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static void __init highbank_timer_init(void)
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{
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int irq;
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struct device_node *np;
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void __iomem *timer_base;
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/* Map system registers */
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np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
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sregs_base = of_iomap(np, 0);
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WARN_ON(!sregs_base);
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np = of_find_compatible_node(NULL, NULL, "arm,sp804");
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timer_base = of_iomap(np, 0);
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WARN_ON(!timer_base);
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irq = irq_of_parse_and_map(np, 0);
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highbank_clocks_init();
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sp804_clocksource_init(timer_base + 0x20, "timer1");
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sp804_clockevents_init(timer_base, irq, "timer0");
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}
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static struct sys_timer highbank_timer = {
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.init = highbank_timer_init,
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};
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static void highbank_power_off(void)
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{
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hignbank_set_pwr_shutdown();
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scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
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while (1)
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cpu_do_idle();
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}
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static void __init highbank_init(void)
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{
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pm_power_off = highbank_power_off;
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const char *highbank_match[] __initconst = {
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"calxeda,highbank",
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NULL,
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};
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DT_MACHINE_START(HIGHBANK, "Highbank")
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.map_io = highbank_map_io,
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.init_irq = highbank_init_irq,
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.timer = &highbank_timer,
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.init_machine = highbank_init,
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.dt_compat = highbank_match,
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MACHINE_END
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@ -0,0 +1,19 @@
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/*
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* Debugging macro include header
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*
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* Copyright (C) 1994-1999 Russell King
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* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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.macro addruart,rp,rv,tmp
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movw \rv, #0x6000
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movt \rv, #0xfee3
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movw \rp, #0x6000
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movt \rp, #0xfff3
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.endm
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#include <asm/hardware/debug-pl01x.S>
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@ -0,0 +1,7 @@
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#include <asm/hardware/entry-macro-gic.S>
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.macro disable_fiq
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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@ -0,0 +1 @@
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/* empty */
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@ -0,0 +1,7 @@
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#ifndef __MACH_IO_H
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#define __MACH_IO_H
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#define __io(a) ({ (void)(a); __typesafe_io(0); })
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#define __mem_pci(a) (a)
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#endif
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@ -0,0 +1,6 @@
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#ifndef __MACH_IRQS_H
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#define __MACH_IRQS_H
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#define NR_IRQS 192
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#endif
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@ -0,0 +1 @@
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/* empty */
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@ -0,0 +1,26 @@
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/*
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* Copyright 2010-2011 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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||||||
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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||||||
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
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||||||
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*
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* You should have received a copy of the GNU General Public License along with
|
||||||
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MACH_SYSTEM_H
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#define __MACH_SYSTEM_H
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static inline void arch_idle(void)
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{
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cpu_do_idle();
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}
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extern void arch_reset(char mode, const char *cmd);
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#endif
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@ -0,0 +1,6 @@
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#ifndef __MACH_TIMEX_H
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#define __MACH_TIMEX_H
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#define CLOCK_TICK_RATE 1000000
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#endif
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@ -0,0 +1,9 @@
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#ifndef __MACH_UNCOMPRESS_H
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#define __MACH_UNCOMPRESS_H
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#define putc(c)
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#define flush()
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#define arch_decomp_setup()
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#define arch_decomp_wdog()
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#endif
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@ -0,0 +1 @@
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#define VMALLOC_END 0xFEE00000UL
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@ -0,0 +1,34 @@
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/*
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* Copyright 2011 Calxeda, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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||||||
|
* under the terms and conditions of the GNU General Public License,
|
||||||
|
* version 2, as published by the Free Software Foundation.
|
||||||
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*
|
||||||
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
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*
|
||||||
|
* You should have received a copy of the GNU General Public License along with
|
||||||
|
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
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#include <linux/init.h>
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#include <asm/page.h>
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||||||
|
#include <asm/sizes.h>
|
||||||
|
#include <asm/mach/map.h>
|
||||||
|
|
||||||
|
#define HB_DEBUG_LL_PHYS_BASE 0xfff36000
|
||||||
|
#define HB_DEBUG_LL_VIRT_BASE 0xfee36000
|
||||||
|
|
||||||
|
static struct map_desc lluart_io_desc __initdata = {
|
||||||
|
.virtual = HB_DEBUG_LL_VIRT_BASE,
|
||||||
|
.pfn = __phys_to_pfn(HB_DEBUG_LL_PHYS_BASE),
|
||||||
|
.length = SZ_4K,
|
||||||
|
.type = MT_DEVICE,
|
||||||
|
};
|
||||||
|
|
||||||
|
void __init highbank_lluart_map_io(void)
|
||||||
|
{
|
||||||
|
iotable_init(&lluart_io_desc, 1);
|
||||||
|
}
|
|
@ -0,0 +1,52 @@
|
||||||
|
/*
|
||||||
|
* Copyright 2011 Calxeda, Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms and conditions of the GNU General Public License,
|
||||||
|
* version 2, as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License along with
|
||||||
|
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
#ifndef _MACH_HIGHBANK__SYSREGS_H_
|
||||||
|
#define _MACH_HIGHBANK__SYSREGS_H_
|
||||||
|
|
||||||
|
#include <linux/io.h>
|
||||||
|
|
||||||
|
extern void __iomem *sregs_base;
|
||||||
|
|
||||||
|
#define HB_SREG_A9_PWR_REQ 0xf00
|
||||||
|
#define HB_SREG_A9_BOOT_STAT 0xf04
|
||||||
|
#define HB_SREG_A9_BOOT_DATA 0xf08
|
||||||
|
|
||||||
|
#define HB_PWR_SUSPEND 0
|
||||||
|
#define HB_PWR_SOFT_RESET 1
|
||||||
|
#define HB_PWR_HARD_RESET 2
|
||||||
|
#define HB_PWR_SHUTDOWN 3
|
||||||
|
|
||||||
|
static inline void hignbank_set_pwr_suspend(void)
|
||||||
|
{
|
||||||
|
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void hignbank_set_pwr_shutdown(void)
|
||||||
|
{
|
||||||
|
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void hignbank_set_pwr_soft_reset(void)
|
||||||
|
{
|
||||||
|
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void hignbank_set_pwr_hard_reset(void)
|
||||||
|
{
|
||||||
|
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,33 @@
|
||||||
|
/*
|
||||||
|
* Copyright 2011 Calxeda, Inc.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms and conditions of the GNU General Public License,
|
||||||
|
* version 2, as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License along with
|
||||||
|
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
#include <linux/io.h>
|
||||||
|
#include <asm/smp_scu.h>
|
||||||
|
#include <asm/proc-fns.h>
|
||||||
|
|
||||||
|
#include "core.h"
|
||||||
|
#include "sysregs.h"
|
||||||
|
|
||||||
|
void arch_reset(char mode, const char *cmd)
|
||||||
|
{
|
||||||
|
if (mode == 'h')
|
||||||
|
hignbank_set_pwr_hard_reset();
|
||||||
|
else
|
||||||
|
hignbank_set_pwr_soft_reset();
|
||||||
|
|
||||||
|
scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
|
||||||
|
cpu_do_idle();
|
||||||
|
}
|
||||||
|
|
|
@ -822,7 +822,7 @@ config CACHE_L2X0
|
||||||
REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \
|
REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \
|
||||||
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
|
ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
|
||||||
ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
|
ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
|
||||||
ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX
|
ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
|
||||||
default y
|
default y
|
||||||
select OUTER_CACHE
|
select OUTER_CACHE
|
||||||
select OUTER_CACHE_SYNC
|
select OUTER_CACHE_SYNC
|
||||||
|
|
Loading…
Reference in New Issue